When a signal needs a specific impedance to operate properly, controlled impedance should be preferred. In high frequency applications, keeping impedance constant on the complete electronic board is essential to protect the transferred data from damage and to maintain the clarity of the signal. The longer the trace or the higher the frequency, the more adaptation is needed. Any lack of rigor at this stage can increase the switching time for an electronic device or circuit and cause unexpected errors.

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What are the applications of PCB impedance control?

Controlled Impedance should be considered for PCBs used in fast digital applications such as:

·  Telecommunications

·  Computing 100MHz and above

·  High Quality Analog Video

·  Signal Processing

·  RF Communication

How to control dielectric of PCB impedance?

The typical design considerations involved in the determination of the requirement for controlling the impedance are the strength of the signals involved, the susceptibility of the circuit to noise and signal distortion, the criticality of signal timing and the speed at which the signal’s source is attempting to force a change in voltage and/or current.

Why control impedance on PCBs?

When a signal needs a specific impedance to operate properly, controlled impedance should be preferred. In high frequency applications, keeping impedance constant on the complete electronic board is essential to protect the transferred data from damage and to maintain the clarity of the signal. The longer the trace or the higher the frequency, the more adaptation is needed. Any lack of rigor at this stage can increase the switching time for an electronic device or circuit and cause unexpected errors.

Uncontrolled impedance is difficult to analyze once the components are mounted on the circuit. Components have different tolerance capacities depending on their batch. Furthermore, their specifications are impacted by temperature variations which can lead to malfunctions. In such cases, replacing the component may seem to be the solution at first when, as a matter of fact, it is the unsuitable trace impedance that is the cause of the problem. This is why trace impedances and their tolerances must be checked early on in the PCB design. Designers must work hand in hand with the manufacturer to guarantee the compliance of component values.

What are the factors of PCB impedance control requirements?

Many factors influence the stack-up design parameters and choices (such as impedance, physical structure, blind holes, and so on). The impedance of signal lines is affected by the stack-up structure characteristics. Change the stack-up parameters help attain target impedance. It is equally important to examine and balance other aspects in design that impact the stack-up. Consider the following:

·  The thicker the dielectric thickness, the higher the impedance

·  The smaller the dielectric constant, the greater the impedance

·  The thicker the copper weight, the lower the impedance

·  The impedance value will be higher if the dielectric constant is less

·  A greater inductance indicates a higher impedance

·  A higher capacitance indicates a lower impedance

How to avoid the common problems of PCB impedance control?

Here is a list of impedance-related notes we have seen that can also cause confusion or on-hold situations:

Only one trace width can meet a particular impedance on any one layer. It is not sensible to expect, say, a 0.007” trace and a 0.005” trace to both solve for 50 Ohms on the same layer. Although this seems painfully obvious, we have seen instances where the requirements were called out in this manner. It does not work. Only one trace width or pair geometry can meet a particular target impedance per layer.

If you have a dense 16-layer board, and your note reads: “All signal layers: 0.004” trace, 0.006” space to be 100 Ohms differential” please make sure that the specified geometry is present on ALL the signal layers. If it’s not, then clarify by specifying only the layers where the geometries exist. Searching through 8 or 10 dense signal layers with hundreds of seemingly parallel 0.004” traces in search of a few true differential pairs is tedious enough, but searching all those layers to discover that there are 0.004” / 0.006” pairs on just ONE of the internal layers wastes significant time.

It is also necessary, once the weeding-through is completed, to document that impedance testing may be waived for layers not using those pairs. Otherwise an incoming inspector will reject the impedance report when the boards arrive, on the grounds that it is incomplete as defined by the drawing note. Therefore, it is important that you identify only those layers that actually use the specified trace geometries.

If you supply a reference stack-up, it is good practice to also state clearly whether or not you permit adjustments to meet the impedance targets. Some drawings arrive with generic stack-ups included, which will not serve to meet the custom requirements of a controlled impedance PCB. If the notes do not make it clear that adjustments are permitted, then the fabricator has no choice but to stop the order and seek your permission to deviate from the supplied stack-up.