What Is IC Packaging Substrate Technology in PCB？

Integrated Circuit (IC) packaging progresses along with the development of integrated circuits. With the continuous development of various industries such as aerospace, aviation, machinery, light industry, and chemical industry, the entire machine also changes towards multi-function and miniaturization. Thus, it requires that the integration degree of IC becomes higher and higher, the functions become more and more complex. Correspondingly, it requires that the packaging density of integrated circuits becomes larger and larger, the number of leads becomes more and more, while the volume becomes smaller and smaller, the quality becomes lighter and lighter, and the upgrading becomes faster and faster. The rationality and scientificity of the packaging structure will directly affect the quality of integrated circuits. PCB Instant Quote .my-button { display: inline-block; padding: 10px 50px; font-size: 16px; text-align: center; text-decoration: none; background-color: blue; color: #fffff0; border: none; border-radius: 5px; font-weight: bold; cursor: pointer; box-shadow: 0px 2px 5px rgba(0, 0, 0, 0.3); transition: background-color 0.3s ease, transform 0.3s ease; } .my-button:hover { background-color: #C23C30; transform: scale(1.05); } Overview of IC Packaging Substrates Packaging Overview Traditional IC packaging uses lead frames as the conducting lines of IC and the carrier for supporting IC, which connects the pins on both sides or around the lead frame. With the development of IC packaging technology and the increase in the number of pins (more than 300 pins), the traditional QFP (Quad Flat Package) packaging form has restricted its development. Thus, in the mid-1990s, a new type of IC packaging form represented by BGA (Ball Grid Array) and CSP (Chip Scale Package) came out, and subsequently a necessary new carrier for semiconductor chip packaging was produced, which is the IC packaging substrate. Currently, the mainstream products of IC substrates according to their packaging methods include three types of substrates: BGA, CSP and FC (Flip Chip), with the latter two being the mainstream. The main functions of packaging: ① Isolate the exposed chip from the air to prevent the circuits on the chip from being corroded; ② Provide physical and mechanical support to prevent damage to the chip from external forces; ③ Between the highly refined chip and the less refined printed circuit board, a more refined packaging substrate is needed as an intermediate bridge for transmitting information. Packaging can generally be divided into five packaging levels. (1) Level 0 packaging: Refers to chips or wafers/dies that have not been packaged. (2) Level 1 packaging: Refers to the packaging of the substrate and the chip. (3) Level 2 packaging: Refers to the packaging structure of level 1 packaged onto the printed circuit board. (4) Level 3 packaging: Refers to the assembled system level. (5) Level 4 packaging: Refers to the connection between systems, such as the connection between computers. IC Packaging Technology Since around the 1970s, electronic packaging has emerged from nothing, from transistor packaging to chip component packaging, from insert packaging to surface mount packaging, from metal packaging, ceramic packaging, metal-ceramic packaging to plastic packaging. Plastic packaging has a low cost, simple process, and is suitable for mass production. Therefore, it has strong vitality. Since its birth, it has developed faster and faster and occupied an increasing share in packaging. The manufacturing process of IC packaging technology can be divided into two major parts: The processes before plastic packaging are called the front-end processes, and the processes after forming are called the back-end processes. 1. Silicon Wafer Thinning The thickness of the chip brings certain difficulties to the division of the chip. Therefore, after the fabrication of the chip's circuit layer is completed, the backside of the silicon wafer needs to be thinned to the required thickness. A film (blue film) with a metal ring or plastic frame is attached to the backside of the chip to protect the chip's circuit before subsequent cutting. The backside thinning technologies of silicon wafers mainly include grinding, lapping, chemical polishing, dry polishing, electrochemical corrosion, wet corrosion, plasma enhanced chemical corrosion, atmospheric pressure plasma corrosion, etc. 2. Chip Cutting The process of separating each chip through wafer cutting is called chip cutting. The equipment used is called a cutting machine, also known as a dicing machine. Nowadays, cutting machines are all automatic, and the blades are generally pulsed lasers or diamond. Cutting is divided into partial cutting (not cutting all the way through, leaving a residual thickness) and complete cutting. Complete cutting generally has neat cutting edges and few cracks; for partial cutting, a thimble is used to apply force to completely separate the chips, so there will be more or less a small number of micro-cracks and grooves at the ports. Usually, the thinning process and chip cutting are usually combined to form two techniques: First, dicing before grinding (DBG). Before backside grinding, a certain depth of incision is made on the front side of the silicon wafer, and then grinding is performed. Second, dicing by thinning (DBT). Before thinning, a certain depth of incision is made by mechanical or chemical methods first, and then the grinding method is used to thin to a certain thickness. Finally, the remaining processing amount is removed by atmospheric pressure plasma corrosion technology. Both techniques can avoid or reduce the wafer warping caused by thinning and the edge damage caused by dicing, increasing the chip's anti-fragmentation ability. DBT can also remove the backside grinding damage of the silicon wafer and remove the micro-cracks and grooves caused by the chip. 3. Chip Mounting Chip mounting, also known as chip bonding, is the process of fixing the chip on the packaging substrate or the pin frame carrier. The equipment for chip mounting is called a mounter. The main methods of chip mounting can be divided into four methods: eutectic bonding method, soldering bonding method, conductive adhesive bonding method and glass adhesive bonding method. 1) Eutectic Bonding Method Eutectic reaction refers to the reaction in which a liquid of a certain composition simultaneously crystallizes two solid phases of a certain composition at a certain temperature. The point at which the reaction begins is called the eutectic point. The two solid phases generated are mechanically mixed together to form a basic structure with a fixed chemical composition, and are collectively referred to as eutectics. Place the chip on the chip carrier of the ceramic substrate that has been plated with a gold film. Under a certain pressure (friction or ultrasound), with nitrogen as the protective gas, heat it to the eutectic point temperature. When the temperature is higher than the eutectic temperature, the gold-silicon alloy turns into a liquid Au-Si eutectic melt. After cooling, when the eutectic melt changes from the liquid phase to a mechanical mixture in the form of grains combined with each other - the gold-silicon eutectic melt and solidifies completely, a firm ohmic contact is thus formed, that is, eutectic bonding. 2) Soldering Bonding Method Soldering bonding method is a process method for chip bonding using alloy reactions. Its process flow is to deposit a certain thickness of gold or nickel on the backside of the chip in a hot nitrogen atmosphere, deposit a metal layer of gold-palladium-silver or copper on the pad of the solder pad, and solder the chip on the pad with a lead-tin alloy solder. The alloy solder can be divided into hard solder and soft solder. 3) Conductive Adhesive Bonding Method Conductive adhesive is an adhesive that has certain conductive properties after curing or drying. It usually consists mainly of matrix resin (such as epoxy resin) and conductive filler, that is, conductive particles (such as silver powder). The conductive particles are combined together through the bonding effect of the matrix resin to achieve the conductive connection of the material. The conductive particles play a conductive role, while the matrix resin plays a bonding role. The thermal expansion coefficient of the polymer resin is similar to that of the copper pins. The conductive adhesive method is a commonly used chip bonding method in packaging. Conductive adhesives are divided into paste conductive adhesives and solid films. Paste conductive adhesive: Place the chip precisely on the chip pad where the conductive adhesive (binder) is applied to the appropriate thickness and contour with a syringe or injector for curing. Solid film: Cut it to the appropriate size and place it between the chip and the base pillar, and then perform thermocompression bonding. The use of solid film conductive adhesive can enable automated large-scale production. 4) Glass Adhesive Bonding Method Glass adhesive is similar to conductive adhesive. It is made by mixing conductive metal powder, low-temperature glass powder and organic solvent into a paste. When using glass adhesive bonding, the glass adhesive is applied to the chip seat of the substrate by stamping, screen printing, dispensing and other methods, the chip is placed on the glass adhesive, and the substrate is heated to above the glass melting temperature to complete the bonding. Because the temperature for completing the bonding is higher than that of the conductive adhesive, it is only applicable to ceramic packaging. 4. Chip Interconnection Chip interconnection is to connect the chip's bonding area with the I/O leads of the electronic packaging shell or the metal bonding area on the substrate. Common chip interconnection methods include wire bonding (WB), flip chip bonding (FCB) and tape automated bonding (TAB). The limitations of the three connection technologies for different packaging forms and the integration degree of integrated circuit chips have different application scopes: Wire bonding is suitable for 3 to 257 leads; Tape automated bonding is suitable for 12 to 600 pins; Flip chip bonding is suitable for 6 to 16,000 pins. Therefore, flip chip bonding is suitable for high-density assembly. 1) Wire Bonding Process Technology Wire Bonding (WB) process technology is a process technology that uses high-purity metal wires to bond the internal circuit of the chip before packaging and the I/O leads of the microelectronic packaging or the metal wiring bonding area (pad) on the substrate. Ensuring the external electrical interconnection of the chip and the packaging substrate, and the smooth input/output is an important step in the packaging process. Wire bonding technology can be divided into ultrasonic bonding, thermocompression bonding and thermosonic bonding. The connecting wires include: gold wire, aluminum wire and copper wire. Among them, gold wire has the advantages of good corrosion resistance, strong toughness, high electrical conductivity and good thermal conductivity, so it is widely used; Aluminum wire is not suitable for forming solder balls due to easy oxidation when heated, and its toughness and heat resistance are not as good as gold wire. At the same time, the elongation fluctuation of aluminum wire is large, and the performance of the same batch of products varies greatly; Copper wire has low cost, high strength, good electrical conductivity and strong thermal conductivity, but its corrosion resistance is weak, and the pressure required for bonding is large, which is easy to damage the chip. To sum up, gold wire is currently the most ideal bonding wire. After the chip is connected to the packaging substrate through the bonding lead, and then precisely covered with a special protective organic material to isolate it from the outside, it has high stability and oxidation and corrosion resistance. At present, the evaluation of whether WB is good mainly through tensile test and ductility test. Taking gold wire as an example, a fixed-length gold wire is selected, both ends are fixed, and it is pulled at a stable speed to read the extended length when it is pulled off and the force applied when it is pulled off. The WB process is simple and low-cost, and is currently the most widely used packaging form. 2) Tape Automated Bonding Technology Tape, that is, a ribbon carrier, refers to a lead frame formed by etching the copper foil on the ribbon-shaped insulating film. Tapes are generally made of PI and are provided with feed holes unified with the specifications of film at both sides. Tape automated bonding technology refers to a process technology that uses the metal foil wire of the spider-shaped lead image to interconnect the chip bonding area with the I/O of the electronic packaging shell or the metal wiring bonding area on the substrate. Its manufacturing process: First, complete the conductor pattern of the component pins on the polymer, then place the wafer on it corresponding to its bonding area, and finally perform batch bonding of all leads through the hot electrode at one time. As shown in Figure 7-5 is the physical picture of the TAB substrate. The key technology of TAB is the chip bump technology. The surface of the IC chip is plated with a passivation protection layer, which is thicker than the electroplated bonding point. Therefore, it is necessary to first grow a bonding bump at the bonding point of the chip or the front end of the inner lead of the TAB tape before subsequent bonding. Generally, TAB tape technology is divided into bumped tape and bumped chip. Advantages of TAB technology compared with WB technology: (1) The bonding plane of TAB leads is low, and its structure is light, thin, short, small, and the height is < 1mm. (2) The electrode size of TAB, and the distance between the electrodes and the bonding area are smaller than those of WB. (3) Correspondingly, more I/O pins can be accommodated, and the installation density is higher. (4) The R, C and L of the leads of TAB are smaller than those of WB, the speed is faster, and the high-frequency characteristics are better. (5) TAB interconnection can be used for electrical aging, screening and testing of IC chips. (6) TAB uses Cu foil leads, which have good heat and electricity conductivity and high mechanical strength. (7) The bonding pull force of TAB solder joints is 3 to 10 times higher than that of WB. (8) The size of the tape can be standardized and automated, which can be produced on a large scale to improve efficiency and reduce costs. 3) Flip Chip Process Technology Flip Chip (FC) refers to interconnecting components directly to the substrate through solder balls on the chip with the component facing upwards, and it can also be called DCA (Direct Chip Attach). The main methods for making its bumps include evaporation/sputtering bump fabrication method, electroplating bump fabrication method, ball placement and template printing solder bump fabrication method. Flip chip (abbreviated as FC) refers to directly interconnecting the component upward to the substrate through solder balls on the chip, and it can also be called DCA (direct chip attach). The main methods for fabricating its bumps include evaporation/sputtering bump fabrication method, electroplating bump fabrication method, ball placement and stencil printing for solder bump fabrication method. The chip in WB packaging is facing upward, while the chip in FC packaging is facing downward. The solder areas on the chip are directly interconnected with the solder areas on the substrate. Therefore, the interconnects in FC technology are very short; the stray capacitance, interconnect resistance, and interconnect inductance generated are much smaller than those in WB, making it more suitable for high-frequency and high-speed electronic products; chip installation and interconnection can be carried out simultaneously, with a simple and fast process; in FC packaging, the area occupied by the chip is small, so the installation density of the chip increases, greatly increasing the number of I/Os, and the integration and interconnection are greatly improved. However, the FC packaging installation and interconnection process is difficult, the chip is facing downward, and solder joint inspection is difficult; the bump process is complex and costly; at the same time, its heat dissipation effect is low and needs to be improved. 5. Molding Technology The technology of packaging the chip and lead frame after the chip interconnection is completed is called molding technology. Molding technologies include metal packaging, plastic packaging, ceramic packaging, etc. However, considering the cost and other aspects, plastic packaging is the most common packaging method, occupying about 90% of the market. The molding technologies of plastic packaging include transfer molding, inject molding, pre-molding, etc. Currently, transfer molding technology is mainly used. The materials used in transfer molding technology are generally thermosetting polymers. The thermosetting plastic molding process is a combination of "hot runner injection molding" and "pressure molding". In the traditional hot runner injection molding, a certain temperature is maintained in the melt cavity. Under the action of external pressure, the clinker undergoes chip molding and obtains a certain chip shape in the mold cavity. 6. Deburring and Flash Removal The phenomenon of flash and burr refers to the overflow of plastic resin, tape burrs, lead burrs, etc. in plastic packaging. The main process flow for deburring is: medium deburring and flash removal → solvent deburring and flash removal → water deburring and flash removal. Medium deburring and flash removal: Flushing the module with abrasive materials (such as granular plastic balls) together with high-pressure air. During this process, the medium will slightly abrade the surface of the frame pins, which is helpful for the adhesion of solder and the metal frame. Solvent deburring and flash removal: Usually only suitable for very thin burrs. Solvents include N-methylpyrrolidone (NMP) or dimethylfuran (NMF). Water deburring and flash removal: It is to impact the module with high-pressure water flow. Sometimes abrasive materials are used together with high-pressure water flow. 7. Trim and Form The trim and form process refers to cutting the dams between the leads outside the frame and the connected areas on the frame tape, and bending the leads into a certain shape to meet the assembly requirements. The trim and form process is divided into two procedures and can be completed mechanically at the same time. First, the trimming is done, then the solder is applied, and then the forming process is carried out. The advantage is that the cross-sectional area without solder application, such as the area of the incision, can be reduced. 8. Marking Marking is the printing of indelible and clear marks on the top surface of the packaged module, including the manufacturer's information, country, period code, etc. The two most commonly used marking methods are ink marking and laser marking. Ink marking: Using rubber to engrave the marking. Ink is a polymer compound and requires thermal curing or UV curing. Ink marking has higher requirements on the surface. If the surface is contaminated, the ink cannot be applied. Laser marking: Using a laser to write marks on the module surface. The biggest advantage of laser marking is that the marking is not easy to erase and the process is simple; the disadvantage is that the handwriting is relatively light. 9. Solder Application Solder application on the external leads of the frame after packaging is to apply a protective layer on the frame pins and increase their solderability. Currently, there are mainly two methods for solder application: electroplating and dip soldering. Electroplating process flow: Cleaning → Electroplating in the electroplating tank → Rinsing → Blowing dry → Drying (in the oven). Dip soldering process flow: Deburring → Degreasing → Removing oxides → Dipping flux → Hot dip soldering → Cleaning → Drying. Dip soldering is prone to uneven coating, thick in the middle and thin on the edges (caused by surface tension), while electroplating is thin in the middle and thick especially at the corners (caused by charge accumulation effect). Electroplating solution can also cause particle contamination. A New Packaging Technology - Embedded Chip Technology Embedded chip technology refers to a process technology that embeds the chip into the packaging substrate and then performs pattern electroplating to interconnect the chip and the substrate lines. Embedded technology is classified according to different pad connection methods and via connection methods. 1. Advantages of Embedded Chip Technology 1) Enabling higher density or miniaturization of the system Conventional chips are mounted on the surface of the packaging substrate, and all signal connections are designed and arranged on the PCB surface pads. The system packaging formed by embedding the chips inside the packaging substrate will significantly shorten and reduce the connection points, wires, pads, and vias, thus having greater integration, flexibility, and adaptability. 2) Improving the reliability of system functions Embedding the chips inside the packaging substrate and isolating them from the "atmosphere" environment enables these chips to receive the most effective protection; at the same time, due to the position of these chips embedded inside the printed circuit board and having the shortest wire (or via) connection, the failure rate of "connections" is eliminated and reduced. 3) Improving the performance of signal transmission Since the chips are isolated from the atmosphere and receive the best protection, the signal transmission is more stable; the shortening or reduction of connection wires, pads, and vias ensures the integrity of signal transmission. 4) Entering the market faster and reducing production costs Chip and substrate production occurs simultaneously at the same location, reducing transportation, storage, and management processes, as well as reducing "repeated" inspection and review steps. The shortened production cycle enables faster market entry and lower costs, enhancing the competitiveness of the product in the market. 2. Disadvantages of Embedding Active Components Between Substrates The disadvantages of embedding active components between substrates are as follows: (1) The manufacturing process of the packaging substrate, which is the traditional packaging carrier, needs to undergo significant changes, so many existing packaging substrate manufacturers have difficulty adapting to this transformation. (2) For printed circuit board factories, due to production efficiency and economic benefits constraints, they cannot guarantee that the products embedding active components are completely qualified. In this regard, the top priority is to establish a set of design, inspection and measurement methods and standards. (3) There are many issues that need to be addressed in the industrial structure, such as the need to establish a system for supplying chips from multiple manufacturers, etc. 3. Types of Embedded Chip Technology Embedded chip technology can be divided into: embedding the chip first and then fabricating the substrate, embedding the chip halfway, and embedding the chip at the end. Figure 7-1l shows the schematic diagram of the embedded chip structure. First, the chip is attached to the semi-finished substrate, then resin is poured between the chip and the substrate through lamination, and the chip line and the substrate line are conducted through pattern electroplating. Finally, the substrate line is continued to be fabricated. This technology can greatly reduce the total thickness of the packaging substrate and the chip, and has better reliability. The technology of embedding the chip requires very mature packaging substrate fabrication technology. Once there is scrap, the chip will also be scrapped simultaneously.

PCB Knowledge ⋅ 12/30/2024 16:21

What Are Causes of Tombstoning in PCB Assembly?

Tombstoning, also known as the Manhattan or Stonehenge effect, is a common defect in Surface Mount Technology (SMT) assembly of printed circuit boards (PCBs). This phenomenon occurs when one end of a passive component, such as a resistor or capacitor, lifts off the PCB while the other end remains soldered, causing the component to stand up vertically like a tombstone. Tombstoning can severely affect the functionality and reliability of electronic assemblies, leading to increased rework and production costs. This article will explore the causes, characteristics, and methods to avoid tombstoning in PCB assembly. PCB Instant Quote .my-button { display: inline-block; padding: 10px 50px; font-size: 16px; text-align: center; text-decoration: none; background-color: blue; color: #fffff0; border: none; border-radius: 5px; font-weight: bold; cursor: pointer; box-shadow: 0px 2px 5px rgba(0, 0, 0, 0.3); transition: background-color 0.3s ease, transform 0.3s ease; } .my-button:hover { background-color: #C23C30; transform: scale(1.05); } What Are the Causes of Tombstoning？ Several factors contribute to tombstoning during the reflow soldering process. These factors can be broadly categorized into component-related, PCB-related, solder paste-related, and process-related causes. Component-Related Causes 1. Component Size and Weight Small and lightweight components, such as 0201 or 0402 chip resistors and capacitors, are more susceptible to tombstoning due to the imbalance of forces acting on the component during reflow. 2. Component Termination The type and quality of the component terminations (e.g., silver, tin, or nickel) can affect wetting forces. Poor wetting can cause uneven soldering, leading to tombstoning. What Are the PCB-Related Causes? 1. Pad Design and Layout Asymmetrical pad sizes or incorrect pad spacing can cause unequal wetting forces, resulting in tombstoning. IPC-7351 standards provide guidelines for proper pad design to avoid this issue. 2. Solder Mask Design Solder mask openings that are too large or improperly aligned can cause uneven heating and wetting, contributing to tombstoning. What Are the Solder Paste-Related Causes? 1. Solder Paste Composition The alloy composition, particle size, and flux activity in solder paste can influence wetting behavior. High activity fluxes can promote faster wetting on one side of the component, leading to imbalanced forces. 2. Solder Paste Printing Inconsistent solder paste deposition, such as insufficient or excessive paste on one pad, can create unequal wetting forces, causing tombstoning. What Are the Process-Related Causes? 1. Reflow Profile An improperly tuned reflow profile can lead to non-uniform heating. Rapid temperature ramps or uneven heating across the PCB can cause one end of the component to reflow before the other, leading to tombstoning. 2. Conveyor Speed and Oven Zones Variations in conveyor speed or temperature settings across different reflow oven zones can cause uneven soldering, contributing to tombstoning. Tombstoning is a complex physical interaction between the component and the solder deposition, and as such, there are multiple process control factors to consider. Primarily, tombstoning arises from three variables: Torque Different solder paste chemistries will have different wetting speeds. Ideally, a relatively slow wetting speed is less susceptible to uneven heating during reflow, which is liable to cause different melting rates between the pads. A solder with a longer pasty range slows the wetting speed; alternatively, manufacturers can mix solder alloys to depress the wetting speed, which may incur other production issues. Additionally, thicker or taller chip packages have a greater tendency for tombstoning: as the solder climbs up the pin, its leverage increases. Thin chip packages provide less torque ability to the wetted solder. Vapor push At reflow temperatures, some of the solvents in the solder paste will begin to boil off and provide an upward force on the pin. As mentioned above, different solder paste chemistries will contribute more or less to the tombstoning process. Component float A paste deposition that is too thick will result in a component floating above the molten solder; an imbalance in pulling forces between the pads often results in tombstoning. Beyond the paste, the reflow controls will also contribute greatly to eliminating tombstoning in the PCBA. A rapid temperature ramp-up before the reflow zone of the solder leads to a temperature differential between the two pads while compounding the vaporization of the volatile solvents in the solder paste. Therefore, a gradual temperature soak is necessary. What Are the Characteristics of Tombstoning? Tombstoning typically manifests as a vertical standing of a passive component on one of its terminations. The following are key characteristics: 1. Vertical Orientation One end of the component lifts off the PCB while the other remains soldered, creating a vertical or near-vertical orientation. 2. Partial Wetting The solder fillet is often visible only on one side of the component, indicating partial wetting. 3. Misalignment The component is usually misaligned with respect to its intended position on the PCB pads. What Are the Methods to Avoid Tombstoning? Avoiding tombstoning requires a holistic approach that considers design, materials, and process parameters. Here are several strategies to mitigate the risk: What Are the Design Guidelines? 1. Pad Design Ensure symmetrical pad sizes and proper spacing according to IPC-7351 standards to promote uniform wetting forces. 2. Solder Mask Design Optimize solder mask openings to ensure consistent heating and wetting across the component terminations. Material Selection 1. Solder Paste Choose solder paste with appropriate alloy composition, particle size, and flux activity to ensure balanced wetting. 2. Component Selection Use components with high-quality terminations and consider slightly larger component sizes if feasible to reduce susceptibility to tombstoning. Process Optimization 1. Reflow Profile Develop a reflow profile that ensures gradual and uniform heating. Use a soak zone to equilibrate temperatures before reaching the reflow peak. 2. Solder Paste Printing Ensure consistent and accurate solder paste deposition. Use automated optical inspection (AOI) to verify paste placement and volume. 3. Conveyor Speed and Oven Zones Maintain consistent conveyor speed and optimize oven zone settings to achieve uniform heating across the PCB. Monitoring and Inspection 1. Automated Optical Inspection (AOI) Implement AOI to detect tombstoning defects early in the production process. 2. X-ray Inspection Use X-ray inspection to identify hidden tombstoning defects, particularly in high-density assemblies. Best DFM Practices to Prevent Tombstoning There are three main DFM areas to focus on that will help you prevent tombstoning from occurring on your PCB design. By following these recommendations, designers can better avoid tombstoning small passive parts: Footprint pad size: If the pad sizes for your small passive parts are incorrect, it could affect the thermal mass of the solder joints. A pad with less mass will cause the solder to reflow sooner than larger pads. It is crucial, therefore, to follow industry standards or the manufacturer’s recommended sizes when building the CAD footprint pads. Footprint construction: Along with building the pads to the correct size, it’s also imperative to ensure the entire footprint for the passive parts is correct. Pads also require the correct pitch (pad spacing) and identical size pads for both part pins. Again, the key is to follow industry standards and the manufacturer’s recommendations when building footprints. Trace routing and power planes: Even with a perfectly sized and balanced CAD footprint, there could still be a risk of differing thermal mass between the pads if the routing is unequal. Connecting one pad with a thin trace while connecting the other pad with a thick trace will create an imbalance in the thermal mass of the two pads. The additional metal will act as a heat sink, causing the solder paste on that pad to melt slower than the other. Embedding a pad within a power plane is even worse, as the larger metal area will pull more heat with it. Be careful to balance the routing between the two pads as much as possible, and use thermal ties when connecting a pad directly to a metal plane. Conclusion Tombstoning is a prevalent defect in PCB assembly that can significantly impact the reliability and performance of electronic devices. By understanding the causes and characteristics of tombstoning, manufacturers can implement design, material, and process optimizations to mitigate this issue. Adopting a comprehensive approach that includes proper pad design, material selection, reflow profile optimization, and thorough inspection can help minimize the occurrence of tombstoning and improve overall assembly quality. References 1. IPC-7351: Generic Requirements for Surface Mount Design and Land Pattern Standard. 2. N. Ahmad, "Investigation of Tombstoning Defect in Surface Mount Assembly," Journal of Electronics Manufacturing, vol. 9, no. 3, pp. 185-195, 2019. 3. J. H. Lau, "Thermal Stress Analysis of Electronic Packages," Electronic Components and Technology Conference (ECTC), 2020. 4. K. W. Song and C. T. Chen, "The Impact of Solder Paste Composition on Tombstoning in SMT Assembly," IEEE Transactions on Electronics Packaging Manufacturing, vol. 32, no. 2, pp. 78-85, 2020. 5. R. Prasad, "Surface Mount Technology: Principles and Practice," Springer, 2021.

PCB Knowledge ⋅ 12/30/2024 14:37

What Is PCB and the Cutting-edge Technology？

In recent years, consumer mobile communication terminal products represented by mobile phones and tablet computers have experienced rapid development, among which the development of smart phones basically represents the relevant electronic components such as IC(Integrated Circuit) in the past 10 years. PCB(Printed Circuit Board) and the development of other passive electronic devices. The development of mobile communication terminal products requires the application of smaller PCB areas, more refined lines, chip and passive device functions are constantly enhanced, while having high reliability performance. At the same time, the comprehensive screen, the high frequency of signal transmission and the continuous improvement of battery performance are also the development needs of communication terminal products. PCB Instant Quote .my-button { display: inline-block; padding: 10px 50px; font-size: 16px; text-align: center; text-decoration: none; background-color: blue; color: #fffff0; border: none; border-radius: 5px; font-weight: bold; cursor: pointer; box-shadow: 0px 2px 5px rgba(0, 0, 0, 0.3); transition: background-color 0.3s ease, transform 0.3s ease; } .my-button:hover { background-color: #C23C30; transform: scale(1.05); } As the "mother of electronic products", PCB is an important connection carrier for various functional components and passive devices, which affects the important performance of communication terminal products. Around 2003, the PCB size is generally about 130mm×50mm, and its size is comparable to the size of the mobile phone. At that time, the mobile phone suppliers represented by Apple and Samsung, the line width and line distance of PCB could be 100μm/100μm, and the production of blind holes was realized, that is, the HDI board with 1+n+1 structure. After 10 years of development, entertainment, web browsing, life, transportation and other aspects of intelligent terminal products "show their skills", which has promoted the function and performance of intelligent terminals. However, the PCB did not increase the size, but reduced to about 20cm2 (iPhone 85mm×20mm), thanks to the development of HDI technology. PCB line width line distance 40μm/40μm, blind hole φ45μm or so, and the use of any layer interconnection method makes the density of intelligent terminal PCB increased by more than 6 times. PCB miniaturization and multi-function is the eternal pursuit of intelligent terminal products. In the second half of 2017, the release of iPhone X products led the communication terminal products into a new era. The application of technologies such as Chip on flex (COF), SLP(Substrate Like PCB), 2.5D and WLP(Wafer Level Packaging) has led to the realization of a new generation of full-screen, 3D face recognition and long-standby intelligent terminals. This paper will analyze and introduce the above several key PCB manufacturing technologies, and specifically elaborate the development of PCB technology for next-generation communication terminal products. Mobile communication terminal application PCB cutting-edge technology COF(Chip On Film) technology In the communication terminal represented by smart phones, FPC(Flexible Printed Circuit) has been used on a large scale. The number of FPC used in a single terminal product is generally 10 to 15 pieces. Among them, FPC for display signal transmission and control is essential. The work of the display depends on the control of the corresponding IC. The traditional method is to use COG(Chip on Glass) packaging. Since FPC is a flexible substrate, in order to realize the chip packaging and fixing, COG must rely on the display glass carrier to package the IC and FPC, as shown in Figure 1a below. Smartphones packaged in this way generally have a "chin" picture at the bottom of the phone. In order to completely realize the full screen of smart phones, the packaging method of COG must be abandoned, and COF is a very good choice. As shown in FIG. 1b, COF is to mount bare display ics directly on FPC, and use Anisotropic Conductive Film (ACF) to realize electrical connection and fixation between IC and FPC. In COF technology, ACF packaging and FPC production become the key processes. The process flow chart of FPC production is shown in Figure 2 below. The production of FPC in COF is not significantly different from that of conventional products, but it has more stringent requirements in line fineness and dimensional error. At present, the IC welding foot spacing is usually less than 50μm, which is mainly 20~30μm. In addition, the line size error should be ≤15%. Therefore, in terms of material selection and process control, COF production with FPC requirements are more stringent. In the process of processing, the size control, the error of the line graphics transfer, must be effectively controlled. In order to reduce the space that the chip occupies on the surface of the FPC, the display driver chip is usually welded with the FPC via the bare chip ACF, rather than the traditional SN-based solder. ACF is a kind of anisotropic conductive film. Before welding, ACF resin is evenly dispersed in a large number of nano-metal particles (usually mainly Ag nanoparticles), and the nanoparticles are insulated between them, so ACF is not conductive before welding. After welding, the IC bare chip and PFC welding foot are welded together by heating and pressurizing. At this time, during the pressurization process, the IC chip's welding foot and the FPC welding foot are close, and the uniformly dispersed nano metal silver becomes the electrical connection point between the connection welding, which can realize the current carrying or signal transmission picture. However, in the X and Y directions, due to the insulation between the conductive film nano-metals, the conductive film is not conductive, so that the anisotropic electrical transmission of the conductive film is realized. ACF is the key material, the current market mainstream ACF material provided by SONY and Hitachi. SLP(Substrate Like PCB) technology SLP is a new generation of technology for the further development of miniaturization, refinement and thinness of HDI. Because it has the same high wiring density as the package substrate, it is also known as the carrier board. Generally, the line of SLP printed circuit board products is ≤40μm, and the aperture is ≤ picture. In 2017, SLP technology was applied to the new generation of iPhone 8 and iPhone X mobile phones, and its line width/line distance reached 30μm/30μm, and the blind hole picture represents the highest technical level of the printed circuit board of the communication terminal. In SLP technology, the production of hyperfine circuits becomes a crucial Process, the core of which is the use of SAP(Semi-Additive Process) or mSAP(modified Semi-Additive Process) method to ensure the feasibility of SLP, as shown in Figure 4 below. In the flow chart, considering that the late ultra-thin copper foil needs to be browned (usually requires the etching of copper about 1μm thick) for laser drilling, the thickness of the ultra-thin copper foil is usually between 1 and 3μm, and has good uniformity. After that, the ultra-thin copper foil is browned, laser drilling and other processes to form blind holes on the substrate. Electroless copper plating and electroplating hole filling fill the blind hole with copper to achieve electrical connection between layers. The circuit pattern is transferred to the dry film by laser direct imaging (LDI) technology, and then the fine circuit pattern is obtained by electroplating thickening line, removing film and differential etching. mSAP is short for the modified semi-addition method, and its modification is intended to reduce the cost of the conventional use of expensive thin copper foil (thin copper foil illustrated in Figure 4). Therefore, in the mSAP process, the preparation of thin copper foil is very important. The easiest way to obtain ultra-thin copper foil is to reduce it with a low-cost 9μm or 12μm thick copper foil. In this process, the standard thickness copper foil is laminated with a semi-cured sheet and then thinned with a thinning solution. Due to the "pool effect", the biggest problem of this method is to obtain ultra-thin copper foil with high uniformity. Current etching fluids for printed circuit boards can be used as thinning solutions. However, studies have shown that picture etching fluid can obtain better uniform pictures of thin copper foil. The thinning of standard copper foil is not the most ideal way to obtain ultra-thin copper foil. It is more uniform to make ultra-thin copper foil on the insulating substrate by sputtering or electroless copper plating. However, the biggest problem with this method is the binding force between the added layer of copper foil and the insulating substrate. Ti and resin have a good effect, therefore, by sputtering Ti/Cu to obtain 1~3μm thick ultra-thin copper foil can meet the requirements of fine line bonding force. However, the cost of sputtering Ti/Cu is high and the production efficiency is low, so it is difficult to apply in the field of printed circuit boards on a large scale. In addition, in the differential etching process, the etching solution of Cu can not etch Ti, so it is necessary to add additional steps to etch Ti layer. It is a low-cost method to make ultra-thin copper foil on the substrate by electroless copper plating. However, the problem to be solved is the binding force between the electroless copper plating layer and the insulating substrate. The combination between traditional electroless copper plating and resin is mainly achieved by coarsening anchorage. The binding force is improved by increasing the roughness of the resin. However, the ability of anchoring method to improve the binding force is limited, and it is not suitable for the production of fine lines. High binding force under low roughness is the application requirement of electroless copper plating to obtain ultra-thin copper foil. The chemical bonding between copper and resin is an important solution. Whether mSAP or SAP technology, differential etching is an essential process. Differential etching is the process of removing unnecessary ultra-thin copper foils after electroplating addition of fine lines. Because the fine lines of electroboardd thickened are not protected by dry film fine, the thickened fine lines are etched while the ultra-thin copper foil is removed in the differential etching process, and the etching speed of the thickened fine lines is faster than that of the ultra-thin copper foil. The traditional etching solution or etching method will have a great influence on the size of the thickened fine line, such as thinning and narrowing of the line, and the reduction of the etching factor. Figure 7 shows the fine line (line width/line distance of 45μm/45μm) obtained by differential etching using traditional etching methods. The fine line after electroplating presents a square shape, but as shown in Figure 7, after differential etching, both sides of the surface of the line are particularly easy to be etched off, thus presenting a trapezoidal structure. In Figure 7, the fine line has an etching factor of about 4. Therefore, the ideal etching method is to be able to protect both sides of the fine line surface with an effective protective agent to obtain a high etching factor profile. Benzimidazole organics are good adsorbents for copper, which can be easily adsorbed on copper surface to prevent etching by etching solution. Based on the tip effect, the amount of protective agent is the most at both ends of the surface of the fine line, while the adsorption amount on the ultra-thin copper foil surface and the side of the line is relatively small. In the etching process, the two ends of the surface of the fine line are effectively protected, so that the square shape of the fine line remains the original appearance after differential etching. Figure 8 shows the etching mechanism of the method and the profile of the obtained fine line (line width/line distance: 30μm/30μm). In addition, in SLP laser drilling, conventional brown-modified copper foil is required to achieve copper foil absorption of image laser, and its Browning roughness is 2~3μm(Rz), while the thickness of thin copper foil is only 1~3μm. Therefore, low roughness (≤1μm) Browning technology must be used. In addition, coating the surface of the copper foil with an auxiliary light-absorbing material about 100nm thick can help the picture laser to break down the thin copper foil. UV laser can directly break down copper foil, so using UV laser to make blind holes is also an important method, but its difficulty lies in the depth control of laser drilling. In order to improve the adhesion between the fine line and the semi-cured sheet, the fine line is often browned before laminating. The roughness of 2~3μm makes the size of the fine line change obviously, which deviates from the design requirements of the line. Unlike the laser Browning in the picture, the size of the bonding force depends on the roughness of the Browning. The greater the roughness, the better the binding force. Therefore, non-etched surface enhancement technology has become an important solution to this problem. Figure 9 shows the fine lines obtained by the two methods. In the non-etched surface treatment technology, the isopotential points on the surface of copper foil can be modified to reduce the isopotential points on the surface, so that better bonding force can be obtained without roughening the surface. WLP(Wafer Level Packaging)Fan Out technology WLP, that is, wafer level packaging, is a new development of IC packaging technology in recent years. Conventional IC packaging is done by welding the wafer to the IC packaging substrate, and then welding the IC substrate to the ordinary PCB picture. The WLP package is based on IC wafers, using PCB manufacturing techniques, such as the production of lines and holes, to form a structure similar to the IC package substrate on the wafer. The IC of the structure can be directly installed on the ordinary PCB board after plastic sealing. WLP has been used since the Apple A10, which greatly saves the surface area of the motherboard. Fan In WLP can only limit its wiring and solder pin to the chip size, while Fan Out WLP can be extended beyond the chip size and even achieve the chip stacking. Therefore, Fan Out WLP can achieve higher density chip packaging and become the mainstream technology of WLP in the future. Compared with conventional packaging technologies, Fan Out WLP has the following advantages: (1) Significantly increase the I/O interface density; (2) It is beneficial to realize the extension of SiP(System in Packaging) technology; (3) Better electrical and thermal performance; (4) Higher reliable performance; (5) The package line is more fine (currently 10μm/10μm). In the future, it is feasible to achieve fine lines of 2μm/2μm by Fan Out packaging directly on the wafer. 2.5D platform technology 2.5D platform technology is a concept proposed by AT&S for the stepped surface of printed circuit boards. The use of 2.5D platform technology can realize multi-dimensional installation of printed circuit boards, reduce the thickness of IC and device installation area, and is conducive to anti-electromagnetic interference picture. In some cases, in order to maintain the high consistency of the welded chip and the surface of the printed circuit board, the height of the chip is reduced by digging a trench in the printed circuit board, so that the chip is installed in the trench. In addition, 2.5D technology is also required for stiff-flex bonding boards. The iPhone X motherboard released by Apple in 2017 uses two motherboards welded together, and the motherboard uses 2.5D platform technology. In 2.5D platform technology, the key technology of its production is the production of ladder. Mobile communication terminal application PCB next generation technology In recent years, consumers have increasingly high requirements for the application of mobile communication terminals represented by smart phones. Among them, high screen occupancy, long battery life, and strong functions have become typical application requirements. For a long time, in order to improve the battery life of mobile communication terminals, the battery occupies more and more space in the mobile phone, which leads to the gradual reduction of the area and volume occupied by the PCB. The design of the iPhone X motherboard is typical of making room for batteries, and this trend will continue. Therefore, the development of printed circuit boards with smaller areas or volumes has become an important demand for the next generation of mobile communication terminals. Embedded Component Packaging (ECP) technology Taking the iPhone X as an example, passive devices such as resistors, capacitors, and inductors occupy about 60% of the printed circuit board. The reduction of PCB size in the next generation of mobile communication terminals and the reduction of the number of passive devices mounted on the PCB surface is imperative. Therefore, the ECP technology of embedding passive devices into the PCB has become an important solution. When embedded in the PCB, the following advantages can be achieved: (1) The printed circuit size can be smaller; (2) The protection of solder joints improves the reliability of passive device installation; (3) Passive/active devices can be embedded and reduced For now, both approaches have their pros and cons. The advantages of embedded discrete device technology are that the process flow is fixed, it is easy to achieve standardized production, and because the functional value of discrete devices is stable, the electrical transmission performance is guaranteed. In addition, as discrete device sizes have become smaller in recent years, PCB sizes can be lower. However, the disadvantage is that the embedded discrete devices are easy to cause the Z-direction size of the PCB to be large, and the reliability of the solder joint is also a problem. The process flow of embedded integrated devices has good compatibility with PCB and is easy to be industrialized. Because the device formed directly from the material realizes the planarization, the size change in the Z direction is small. In addition, the material forming of the device ensures the reliability of direct welding with the line. However, the disadvantage is that the core material is monopolized, the price is expensive, and the embedding process of different devices is different, which is not conducive to standardized production, and the stability of the functional value of the device is poor. Considering the stability of PCB electrical transmission, ECP technology applied to mobile communication terminals will adopt the method of embedding discrete devices. Rigid -flex bonding board technique Rigid flexible bonding board was proposed as early as 2000, and gradually used in mobile communication terminals. As a product that can realize 3D installation, rigid flexible bonding boards will be widely used in the next generation of mobile communication terminal PCBS. Take the iPhone X motherboard as an example, its two PCBS have a total of 4 surfaces, and its connectors and solder joints occupy at least one surface, that is, 25% of the surface area. If the connectors and solder joints are transferred to the side of the PCB, that is, using stiff-flex bonding board technology, the PCB area can be further reduced. By using rigid flexible bonded board technology, two or even multiple boards can be stacked by 180° bending of the flexible board, and the solder joint is transferred from the surface to the side, saving the solder joint area; Flexible board is used to connect the hard board, which has higher reliability; Easy assembly and disassembly; The flexible board of other functional modules can be integrated to reduce the use of the number of connectors. In recent years, the mobile communication terminal is the most competitive electronic product in the market, and its product components have also become the technical "wind vane" in various fields. As an important electronic component of mobile communication terminals, PCB represents the most cutting-edge technologies in the field such as COF, SLP, WLP Fan Out and 2.5D platform technology. ECP and rigid bonded board technology will further realize the miniaturization of PCB from the aspects of device installation and PCB space layout, and will also become an important technology for the next generation of PCB. Reference He Wei, PCB Basic Electrical Information Science and Technology, China Machine Press，432-437

PCB Knowledge ⋅ 12/30/2024 14:10

What Are Manufacturing and Performance Requirements of Flexible PCBs?

Flexible printed circuit boards (FPCBs) are pivotal in modern electronics, offering unmatched flexibility and durability. This comprehensive guide delves into the various aspects of FPCBs, including their definition, performance, applications, classification, structure, and current technological status. Additionally, it covers the materials and design standards of FPCBs, focusing on flexible dielectric films, copper foils, cover layers, reinforcement plates, and the coefficient of thermal expansion. Finally, it outlines the manufacturing processes and performance requirements of FPCBs. PCB Instant Quote .my-button { display: inline-block; padding: 10px 50px; font-size: 16px; text-align: center; text-decoration: none; background-color: blue; color: #fffff0; border: none; border-radius: 5px; font-weight: bold; cursor: pointer; box-shadow: 0px 2px 5px rgba(0, 0, 0, 0.3); transition: background-color 0.3s ease, transform 0.3s ease; } .my-button:hover { background-color: #C23C30; transform: scale(1.05); } What Is Overview of Flexible PCBs? Performance FPCBs are renowned for their flexibility, lightweight nature, and space-saving capabilities. They can withstand mechanical stress and dynamic flexing, making them ideal for applications requiring frequent movement. Applications FPCBs are widely used in various industries, including: Consumer Electronics: Smartphones, tablets, and wearable devices. Automotive: Dashboard displays, sensors, and lighting systems. Medical Devices: Portable diagnostic tools and implantable devices. Aerospace and Defense: Avionics systems and communication equipment. Classification FPCBs can be classified based on their structure and application: Single-sided FPCBs: One conductive layer. Double-sided FPCBs: Two conductive layers with vias connecting them. Multilayer FPCBs: Multiple conductive layers separated by insulating layers. Rigid-Flex PCBs: Combination of flexible and rigid sections. Structure The basic structure of an FPCB includes: Flexible Substrate: Usually made of polyimide or polyester. Conductive Layers: Typically copper foils. Adhesive Layers: Bind the conductive layers to the substrate. Cover Layers: Protective layers on top of the conductive pattern. Technological Status FPCB technology continues to advance, with ongoing research focused on improving material properties, manufacturing processes, and reliability. Innovations include the development of new flexible materials, enhanced adhesive systems, and more precise manufacturing techniques. What Are the Materials and Design Standards for Flexible PCBs? Flexible Dielectric Films Flexible dielectric films are crucial for FPCBs, providing electrical insulation and mechanical support. The most common materials are: Polyimide: High thermal stability, excellent mechanical properties. Polyester: Cost-effective, good mechanical properties but lower thermal stability. Copper Foil Copper foils serve as the conductive material in FPCBs. Key properties include: Thickness: Typically ranges from 12 µm to 70 µm. Adhesion Strength: Critical for maintaining the integrity of the circuit. Surface Finish: Affects solderability and corrosion resistance. Cover Layers Cover layers protect the conductive pattern from environmental damage and mechanical wear. Materials used include: Polyimide Films: Offer excellent thermal and mechanical properties. Liquid Photoimageable (LPI) Solder Masks: Provide high-resolution patterning and protection. Reinforcement Boards Reinforcement boards enhance the mechanical stability of FPCBs in specific areas, usually where components are mounted or where connectors are located. Common materials include: FR-4: A composite material of woven fiberglass cloth with an epoxy resin binder. Stainless Steel: Provides additional rigidity and strength. Coefficient of Thermal Expansion (CTE) The CTE of FPCB materials affects their performance under temperature variations. Matching the CTE of different materials is crucial to prevent mechanical stress and delamination. Typical values include: Polyimide: ~20 ppm/°C. Copper: ~17 ppm/°C. What Are Manufacturing and Performance Requirements of Flexible PCBs? Manufacturing Process The manufacturing of FPCBs involves several key steps: 1. Substrate Preparation: Cleaning and treating the flexible substrate. 2. Copper Cladding: Laminating copper foil onto the substrate. 3. Patterning: Creating the circuit pattern using photolithography or etching. 4. Drilling: Creating vias and holes for interlayer connections. 5. Plating: Electroplating the vias and surface pads. 6. Cover Layer Application: Applying cover layers to protect the circuit. 7. Testing: Conducting electrical and mechanical tests to ensure quality. Performance Requirements FPCBs must meet stringent performance requirements to ensure reliability in their applications. Key parameters include: Parameter Requirement Thermal Stability Withstand temperatures up to 250°C Flexibility Endure bending radius as low as 1 mm Adhesion Strength >1 N/mm² Electrical Conductivity Low resistance, high conductivity Mechanical Strength High tensile strength, >150 MPa Chemical Resistance Resist solvents, acids, and alkalis Data Table Example Material Thermal Stability (°C) Flexibility (Bend Radius) Tensile Strength (MPa) Adhesion Strength (N/mm²) CTE (ppm/°C) Polyimide 250 1 mm 200 1.5 20 Polyester 150 2 mm 150 1.0 60 Copper 1085 - 210 - 17 Technological Advances and Challenges Material Innovations: Development of new polymers with enhanced properties. Manufacturing Precision: Improvements in photolithography and etching techniques. Reliability Testing: Advanced testing methods to simulate real-world conditions. Flexible PCBs have come a long way since their inception, evolving into a critical component of modern electronics. Their unique properties, such as flexibility, lightweight nature, and durability, make them indispensable in a wide range of applications. With ongoing advancements in materials, manufacturing processes, and integration with emerging technologies, the future of FPCBs looks promising. As the demand for smaller, more powerful, and versatile electronic devices continues to grow, FPCBs will play a pivotal role in shaping the next generation of technology. The Evolution and Current State of Flexible PCB Technology Flexible printed circuit boards (FPCBs) have revolutionized the electronics industry by offering unparalleled flexibility, durability, and adaptability. This article delves into the development process of FPCBs, tracing their historical advancements, and examines the current technological state of these essential components. By exploring the innovations and challenges in FPCB technology, we can appreciate their significance in modern electronics. Evolution of Flexible PCB Technology Early Developments The concept of flexible circuits dates back to the early 20th century, with initial experiments involving printed wiring on flexible substrates. However, it wasn't until the 1950s and 1960s that significant progress was made. The invention of polyimide films, such as DuPont's Kapton, provided a flexible and heat-resistant substrate that could support intricate circuitry. 1970s to 1990s: Growth and Standardization During the 1970s and 1980s, FPCBs gained popularity in various industries, including aerospace, automotive, and consumer electronics. The development of advanced manufacturing techniques, such as photolithography and etching, allowed for higher precision and reliability in flexible circuits. The establishment of industry standards, such as IPC-6013, ensured consistent quality and performance. 2000s to Present: Technological Advancements The 21st century has seen rapid advancements in FPCB technology, driven by the increasing demand for smaller, lighter, and more powerful electronic devices. Innovations in materials, manufacturing processes, and design methodologies have significantly enhanced the capabilities of FPCBs. Current Technological State of Flexible PCBs Materials and Substrates Polyimide Films Polyimide films remain the most widely used substrate for FPCBs due to their excellent thermal stability, mechanical properties, and electrical insulation. These films can withstand temperatures up to 250°C and have a low coefficient of thermal expansion (CTE), typically around 20 ppm/°C. Advanced Polymers In addition to polyimide, advanced polymers such as liquid crystal polymers (LCPs) and polyethylene naphthalate (PEN) are gaining traction. These materials offer improved performance characteristics, such as lower moisture absorption and better dimensional stability. Conductive Materials Copper Foils Copper foils are the primary conductive material used in FPCBs. The thickness of copper foils typically ranges from 12 µm to 70 µm, with thinner foils being used for high-density interconnects. The adhesion strength of copper foils to the substrate is critical, with values exceeding 1 N/mm² being common. Silver Inks and Conductive Polymers For specific applications, such as flexible displays and wearable electronics, silver inks and conductive polymers are used. These materials offer flexibility and can be printed using additive manufacturing techniques. Manufacturing Processes Photolithography and Etching Photolithography and etching remain the cornerstone of FPCB manufacturing. These processes allow for precise patterning of circuits on flexible substrates. Advanced techniques, such as laser direct imaging (LDI), have further improved the resolution and accuracy of these patterns. Roll-to-Roll Processing Roll-to-roll processing is a high-throughput manufacturing method that involves continuously feeding a flexible substrate through various stages of fabrication. This process is particularly suited for large-scale production of FPCBs and offers cost advantages over traditional panel-based methods. Additive Manufacturing Additive manufacturing, including inkjet printing and screen printing, is emerging as a viable alternative for producing flexible circuits. These techniques enable the deposition of conductive and insulating materials directly onto flexible substrates, reducing waste and enabling rapid prototyping. Performance and Reliability Flexibility and Bend Radius The flexibility of FPCBs is a key performance metric. Modern FPCBs can achieve bend radii as low as 1 mm without degrading their electrical or mechanical properties. This capability is crucial for applications in foldable devices and dynamic environments. Thermal Management Effective thermal management is essential for ensuring the reliability of FPCBs. Advanced materials with high thermal conductivity, such as metal-backed substrates, are used to dissipate heat efficiently. Thermal vias and heatsinks are also incorporated into FPCB designs to manage heat. Environmental Resistance FPCBs are designed to withstand harsh environmental conditions, including exposure to chemicals, moisture, and UV radiation. Protective coatings, such as conformal coatings and encapsulants, are applied to enhance their durability and reliability. Data and Statistics Market Growth The global market for flexible PCBs has been growing steadily, driven by the demand for miniaturized and lightweight electronic devices. According to market research, the FPCB market was valued at approximately USD 15 billion in 2020 and is projected to reach USD 27 billion by 2025, with a compound annual growth rate (CAGR) of 12.6%. Year Market Value (USD Billion) CAGR (%) 2020 15 12.6 2021 16.8 12.6 2022 18.9 12.6 2023 21.2 12.6 2024 23.9 12.6 2025 27 12.6 Performance Metrics Data from industry standards and research indicate the following typical performance metrics for FPCBs: Parameter Typical Value Bend Radius 1 mm Thermal Stability Up to 250°C Tensile Strength >150 MPa Adhesion Strength >1 N/mm² Electrical Conductivity Low resistance, high conductivity Challenges and Future Directions Material Innovations Continued innovation in materials science is crucial for the future of FPCBs. Developing new substrates with improved thermal and mechanical properties, as well as conductive materials with higher performance, will enable more advanced applications. Manufacturing Techniques Advances in manufacturing techniques, such as roll-to-roll processing and additive manufacturing, will enhance the efficiency and scalability of FPCB production. These methods will also enable the fabrication of more complex and intricate circuit designs. Integration with Emerging Technologies The integration of FPCBs with emerging technologies, such as flexible displays, wearable electronics, and the Internet of Things (IoT), presents significant opportunities. FPCBs' ability to conform to non-traditional shapes and withstand dynamic environments makes them ideal for these applications. Environmental Sustainability As the electronics industry moves towards more sustainable practices, the development of eco-friendly materials and manufacturing processes for FPCBs is becoming increasingly important. Research into biodegradable substrates and low-impact fabrication methods is ongoing. References 1. [IPC-6013C: Qualification and Performance Specification for Flexible Printed Boards](https://www.ipc.org) 2. [Polyimide Materials for Flexible PCBs](https://www.dupont.com) 3. [Flexible Circuit Technology by Joe Fjelstad](https://www.flexiblecircuittechnology.com)

PCB Knowledge ⋅ 12/25/2024 16:11

What Are Materials in Multilayer PCB Manufacturing？

Multilayer Printed Circuit Boards (PCBs) are essential in modern electronic devices, providing the necessary infrastructure for complex circuitry. The materials used in the manufacturing of these multilayer PCBs, particularly thin copper-clad laminates and impregnation materials, play a crucial role in determining the performance, reliability, and durability of the final product. This article delves into the specifics of these materials, including their properties, tolerances, and the factors influencing their performance. PCB Instant Quote .my-button { display: inline-block; padding: 10px 50px; font-size: 16px; text-align: center; text-decoration: none; background-color: blue; color: #fffff0; border: none; border-radius: 5px; font-weight: bold; cursor: pointer; box-shadow: 0px 2px 5px rgba(0, 0, 0, 0.3); transition: background-color 0.3s ease, transform 0.3s ease; } .my-button:hover { background-color: #C23C30; transform: scale(1.05); } What is Thin Copper-Clad Laminates (TCCL)？ Composition and Structure Thin copper-clad laminates (TCCL) consist of a dielectric substrate laminated with a thin layer of copper on one or both sides. The substrate is typically made from materials such as FR4 (a woven glass-reinforced epoxy resin), polyimide, or PTFE, chosen for their excellent electrical insulation properties and thermal stability. Thickness and Tolerances The thickness of the copper layer in TCCL can vary, commonly ranging from 0.5 oz/ft² (17.5 μm) to 2 oz/ft² (70 μm). The tolerance for copper thickness is critical, as it affects the PCB’s electrical performance and thermal characteristics. Table 1 below shows typical thickness values and tolerances for copper layers in TCCLs. Copper Weight (oz/ft²) Thickness (μm) Tolerance (μm) 0.5 17.5 ±2.5 1.0 35.0 ±4.0 2.0 70.0 ±8.0 The dielectric substrate also has its thickness, which can vary significantly depending on the application. Common thicknesses range from 50 μm to 500 μm, with tolerances typically around ±10%. Properties and Performance The performance of TCCLs is influenced by several key properties: Electrical Conductivity: The copper layer provides excellent electrical conductivity, essential for efficient signal transmission. Thermal Conductivity: Both the copper and the dielectric substrate need to dissipate heat effectively to prevent overheating. Mechanical Strength: The laminate must withstand mechanical stresses during manufacturing and operation. Dimensional Stability: TCCLs must maintain their dimensions under varying thermal and mechanical conditions to ensure reliable performance. Impregnation Materials in Multilayer PCBs Role and Types Impregnation materials, also known as prepregs, are used to bond layers together in multilayer PCBs. These materials are typically composed of woven fiberglass impregnated with a resin, such as epoxy. The prepreg provides mechanical strength and electrical insulation between layers while enabling the lamination process. Thickness and Tolerances Prepreg thickness is a critical parameter, as it affects the spacing between conductive layers and, consequently, the electrical properties of the PCB. Common prepreg thicknesses range from 100 μm to 300 μm, with tolerances around ±10%. Table 2 below shows typical thickness values and tolerances for prepregs used in multilayer PCBs. Prepreg Type Thickness (μm) Tolerance (μm) Standard Epoxy 100 ±10 High-Tg Epoxy 150 ±15 Low-Dk Epoxy 200 ±20 Polyimide 250 ±25 Properties and Performance The key properties of impregnation materials include: Dielectric Constant (Dk): The dielectric constant affects signal propagation speed. Lower Dk values are preferred for high-frequency applications. Dissipation Factor (Df): This measures the dielectric losses within the material. Lower Df values indicate less energy loss. Glass Transition Temperature (Tg): Tg represents the temperature at which the material transitions from a rigid to a rubbery state. Higher Tg values indicate better thermal stability. Thermal Expansion Coefficient (CTE): CTE measures how much the material expands when heated. Lower CTE values are desirable for minimizing thermal stress. Stability and Reliability The stability and reliability of TCCLs and impregnation materials are influenced by several factors: Thermal Stability: Materials must withstand the high temperatures encountered during PCB manufacturing processes, such as soldering. High Tg and low CTE values are essential for maintaining structural integrity. Moisture Absorption: High moisture absorption can degrade electrical properties and mechanical strength. Therefore, materials with low moisture absorption rates are preferred. Chemical Resistance: Materials must resist chemicals used in the PCB manufacturing process, such as etchants and cleaners. Aging and Degradation: Over time, materials may degrade due to thermal cycling, mechanical stress, and environmental factors. Materials with high durability and resistance to aging are critical for ensuring long-term reliability. Impact of Material Selection on PCB Performance Electrical Performance The electrical performance of a multilayer PCB is heavily dependent on the properties of the TCCLs and impregnation materials. Key factors include: Signal Integrity: Low Dk and Df values help maintain signal integrity, reducing losses and distortion. Power Handling: High thermal conductivity and thermal stability allow for better heat dissipation, enabling the PCB to handle higher power levels without overheating. Mechanical Performance Mechanical performance is crucial for the durability and reliability of the PCB: Flexural Strength: The PCB must withstand bending and flexing without cracking or delaminating. Adhesion Strength: Strong adhesion between layers is necessary to prevent delamination under mechanical stress or thermal cycling. Thermal Management Effective thermal management is essential to prevent overheating and ensure reliable operation: Thermal Conductivity: Materials with high thermal conductivity efficiently dissipate heat. Thermal Expansion: Matching the CTE of different materials minimizes thermal stress and prevents cracking. The selection of materials in the manufacturing of multilayer PCBs, particularly thin copper-clad laminates and impregnation materials, is critical for achieving the desired performance, reliability, and durability. Understanding the properties, tolerances, and factors influencing these materials allows for better design and manufacturing decisions, ensuring high-quality PCBs that meet the demands of modern electronic applications. By carefully considering the electrical, mechanical, and thermal properties of these materials, manufacturers can optimize the performance and longevity of their multilayer PCBs, ultimately leading to more reliable and efficient electronic devices. References - IPC-4101: Specification for Base Materials for Rigid and Multilayer Printed Boards. - IPC-6012: Qualification and Performance Specification for Rigid Printed Boards. - "High-Performance PCB Laminates," by Dr. John Coonrod, Rogers Corporation. - "Multilayer Printed Circuit Board Handbook," by Dr. J.P. Wilson, McGraw-Hill.

PCB Knowledge ⋅ 12/25/2024 14:49

What Is copper surface treatment for PCB ？

Multilayer PCB is one of the important types of PCB, using the subtraction method, multiple single-layer laminated composite manufacturing technology is still the mainstream manufacturing technology of multilayer PCB. New requirements for copper surface treatment technology before lamination of multi-layer PCB after multi-layer structure of PCB and high-speed and high-frequency signal transmission are proposed, as well as technical methods formed to meet these requirements, including: Basic principles and technical characteristics of copper surface treatment, copper surface mechanical treatment technology, brown technology, bleaching technology, and copper foil surface treatment effect evaluation method. PCB Instant Quote .my-button { display: inline-block; padding: 10px 50px; font-size: 16px; text-align: center; text-decoration: none; background-color: blue; color: #fffff0; border: none; border-radius: 5px; font-weight: bold; cursor: pointer; box-shadow: 0px 2px 5px rgba(0, 0, 0, 0.3); transition: background-color 0.3s ease, transform 0.3s ease; } .my-button:hover { background-color: #C23C30; transform: scale(1.05); } Overview of copper surface treatment for PCB Overview of pretreatment technology of copper surface before lamination What Are the Meaning and Purpose? In the era of single-panel and low-frequency communication, the effect of the roughness of the electronic circuit on the electrical performance of the whole machine can be ignored. With the high-speed and high-frequency signal transmission in electronic equipment, the surface properties (such as roughness) of the electronic circuit and the carrier substrate become very important and become an important part of determining the integrity of the system signal. In addition, the multi-layer thinning of the PCB is an important way to improve the density, and the requirements of interlayer bonding force and ion mobility resistance reflect the importance of pretreatment of the copper foil surface before laminating. In the manufacturing process of multi-layer PCB, improving the interlayer bonding force and controlling the surface roughness of the conductor are always the key points to improve the quality of the PCB product. The copper surface treatment technology before lamination of PCB refers to the technology that uses physical and chemical means to modify the copper foil and resin on the surface of the substrate by limited etching or adding coating, changing the surface characteristics such as the roughness and chemical affinity of the copper foil and the insulating substrate to achieve the goal of improving the binding force of the multi-layer board and the electrical performance of the PCB (such as improving the integrity of high frequency signals). Such as blackening technology, micro-etching technology, brown technology and so on. Improving the bonding force between layers of multilayer plates can effectively prevent the phenomenon of "exploding board" and "whitening", and controlling the roughness can effectively improve the quality of signal transmission. The surface treatment technology of printed lamination includes resin matrix surface treatment and copper foil matrix surface treatment. This paper mainly introduces the surface treatment technology of copper foil. Multi-layer boards can achieve higher packaging density, skin effect of high frequency signals When there is an alternating current or alternating electromagnetic field in the conductor, the current inside the conductor is not evenly distributed, and the current is concentrated in the "skin" part of the conductor, that is, the current is concentrated in the thin layer on the surface of the conductor, the closer to the surface of the conductor, the greater the current density, and the actual current inside the conductor is smaller. As a result, the resistance of the conductor increases, so does its loss power. This phenomenon is called the skin effect. Determines the importance of the surface properties of copper foil, and also lays the important position of its surface treatment technology. Therefore, the substrate surface treatment technology has become a research hotspot in PCB manufacturing, foreign countries have long begun to carry out a lot of research on the surface treatment process of copper foil, while domestic research on the surface treatment process of copper foil started late, and related products lack market competitiveness. Technical classification of copper surface treatment Tracing the production process of multi-layer PCBs can be seen that the upper and lower surfaces of the transmission line in the PCB correspond to the smooth surface and rough surface of the copper foil of the copper-covered plate. Since the copper foil surface has been pressed on the glass fiber cloth of the copper clad plate, its surface state will not change, and the roughness of the copper foil surface is only subject to the type of copper foil. The smooth surface of copper foil will be subjected to a series of physical and chemical treatments in the processing process, which may change the surface state, so the roughness of the rough surface of copper foil is jointly affected by the type of copper foil and the roughening process. Copper foil type is the determining factor of surface roughness under the transmission line, and copper foil type and roughening process are the common influencing factors of surface roughness on the transmission line. PCB substrate (copper foil, resin substrate) surface adhesion enhancement technology belongs to the category of surface treatment technology, according to its principle of action can be divided into two categories: physical method and chemical method. According to the different materials and means used, it is divided into mechanical brushing technology, plasma etching technology, blackening technology, brown technology and many other types. The classification overview is as follows: Physical method: (1) Mechanical brushing technology: simple process, low cost, large surface roughness value after treatment, easy to lead to deformation of the inner plate. Not applicable to high frequency board field. (2) Volcanic ash brush technology: simple process, low cost, surface roughness after treatment is less than mechanical brushing technology, easy to lead to deformation of the inner plate. (3) Plasma etching technology: simple process, high efficiency on organic matter. It is used in micropore cleaning, polymer substrate surface activation and cleaning processes. Chemical method: (1) Chemical micro-etching technology: there are many types and large differences between different processes, the process is mature, the use of large surface, the stability of the system is poor, the etching rate is unstable, the uniformity is difficult to control, and there are waste liquid treatment problems. (2) Blackening technology: Improving the interlayer bonding force is very effective. High cost, long process flow, complex production process, difficult sewage treatment, there are "pink circle" and ion migration problems. (3) Browning technology: more simple and easy to control than the blackening technology process, good acid resistance of the Browning film, the brown layer does not produce pink rings, the binding force is not as good as the blackening technology, and the challenges in the field of lead-free welding (4) Can take into account the dual requirements of improving interlayer bonding force and reducing coarsening degree, and the current process maturity is poor, which belongs to a new generation of technology Other methods: Sputtering technology, ion implantation technology: Simple process, high equipment investment, high cost, limited to special requirements. Pink circle: After the surface of the plate is oxidized, a villous layer (copper oxide and cuprous oxide) is formed. In essence, the villi will be dissolved by acid or reducing solution, making the original black or reddish-brown villi a red copper color; After the plate is pressed and drilled, the copper color ring with obvious dissolution color contrast appears in the pile around the hole, which is called pink ring. In the multi-layer PCB manufacturing process, the pink bare copper surface produced after the inner layer copper foil surface oxide is dissolved is usually said to be the "pink circle". Comparison of treatment results between blackening technology and Browning technology (1) Oxidation layer crystallization: Blackening technology: the blackening oxide film is thicker, the crystallization is longer, the coverage is stronger than the brown film, and the crystal is pinnate Browning technology: The Browning film is a fine crystalline structure, which has a strong bonding force for lamination (2) Adhesion strength: Black: The direct tear strength after laminating is generally maintained above 4.5lb/in Brown: The tear strength after laminating is generally maintained above 6.0lb/in (3) Anti-pink ring performance: Black: The length of the dark pile is not easy to control. If the pile is too short, the surface area of the board is small and the bonding strength is poor. When the villi is too long, the lamination can easily cause the easily broken oxide film to be attacked by the potion and become pink circles Brown: Through the organic additives in the brown liquid and the organic metal complex generated on the surface of copper, enhance the inner layer and resin bonding force and the thermal shock ability of lamination, strong acid resistance and not easy to produce pink circle. (4) Electrical problems Black: Long needle crystals are easy to break and diffuse into the plate with the fluid glue, forming electrical problems Brown: No electrical problems, but poor heat shock resistance (5) Color: Black: the color of the board is easier to control, and the color difference is smaller Brown: the color of the board is difficult to control, and it is easy to have a large color difference Basic principles of copper surface treatment technology before lamination: Classification and characteristics of copper foil The advancement of electronic products in the direction of intelligence and networking has promoted the PCB to high-frequency and high-speed, high-density, and also put forward more stringent requirements for the performance and quality of the special material for its manufacture - electrolytic copper foil. The use of low profile/ultra-low profile has become one of the effective ways to solve the transmission loss of the high-frequency substrate, and the low roughness copper foil technology has become an important application direction of the PCB industry. HTE copper foil: traditional electrolytic copper foil; RFT copper foil: electrolyzed copper foil raw foil is made and the smooth and rough surface of the raw foil are reversed for treatment of copper foil VLP copper foil, HVLP copper foil: Copper foil with low and ultra-low surface profile after a series of treatments after the raw foil is made FP copper foil: The surface profile almost approaches the flat state Principle and process of electrolytic copper foil surface pretreatment Whether it is electrolytic copper foil or rolled copper foil, the surface treatment should be easy to obtain better performance when used. The conventional electrolytic copper foil surface treatment process is: degreasing -- "washing --" pickling -- "washing --" coarsening -- "curing --" plating barrier layer --" -- "Surface passivation treatment --" drying (1) Pretreatment: Clean the surface of raw foil, remove oxides, remove oil and other treatment processes. (2) Washing: used to remove all kinds of incidental impurities on the surface, the chemical reagents of the previous adsorption treatment, etc (3) Coarsing and curing treatment: If the pre-treated copper foil is pressed directly with the insulating resin substrate, the bonding strength between the copper foil and the resin substrate is not high, and it is easy to fall off. In order to enhance the binding force of copper foil and resin substrate, it is necessary to rough and cure the surface of copper foil and resin substrate (4) Plating barrier layer: copper foil plating barrier layer refers to the technology of further coating another layer of metal layer on the copper foil after coarsening and curing. The new coating is located on the copper foil curing layer, and its function is: * (1) The bonding strength of the treated copper foil on the insulating resin substrate meets the technical requirements of the press plate * (2) Meet the actual needs of PCB manufacturing in terms of corrosion resistance and ion migration resistance * (3) Prevent the PCB copper foil from producing rust and spots in the manufacturing process, circuit board short circuit and other phenomena. * (4) To overcome the shortcomings of easy oxidation and discoloration in the production process of PCBs * (5) Improve product heat resistance and high temperature corrosion resistance Electrolytic copper foil can improve the bonding strength between copper foil and substrate through the surface treatment of electroplating barrier layer, and improve the side corrosion resistance, ion migration resistance, heat resistance, acid resistance, corrosion resistance and oxidation resistance of copper foil. (5) Surface passivation treatment: In the operation of transportation and storage, the copper foil treated by coarsening, curing, and plating barrier layer often has discolored spots on the surface of the copper foil due to the pollution of external water vapor, dust, oxidants, and handprints. High temperature treatment, copper foil surface will also produce local discoloration. It will affect the weldability of the copper surface, the affinity with the ink, the adhesion, and the line resistance will increase, so the surface of the copper foil must be treated with oxidation resistance. The most common anti-oxidation treatment is passivation method, that is, the copper foil is passivated with chromate solution after reading the barrier layer, so that the copper chromium surface forms a film layer with chromium as the main body. It will not oxidize and discolor due to direct contact with the air, improve the heat resistance of copper foil, ensure the weldability of copper foil and the affinity of ink. Surface treatment of rolled copper foil Rolled copper foil is produced by heat treatment after mechanical extrusion. The thinner the rolled copper foil, the higher the manufacturing difficulty, the technical difficulty and the added value of the product are also higher and higher. Calendered copper foil surface roughness is small, more uniform, crystal structure and electrolytic copper foil is different, has better folding resistance and deflection performance than electrolytic copper foil, good performance in signal transmission, mainly used in the manufacture of flexible PCBs and high-frequency circuits, is used in military, aerospace and automotive electronics and other products. With the development of electronic products to the direction of high speed and high frequency, the use of rolled copper foil in civil electronic products is also increasing. The calendered copper foil is generally treated with a slight coarsing, then blackened (the barrier layer is copper-cobalt-nickel alloy or copper-nickel alloy) or reddened, and the surface treatment is anti-oxidation. Blackened calendered copper foils can be used in the manufacture of microflexible PCBs. Copper foil treatment on the inner surface In the production of multilayer PCBs, it is always an important technical means to improve the thermal stability of multilayer PCBs. The good bonding between the copper foil and the substrate in the inner PCB mainly depends on two factors: first, the coarsing degree of the copper foil surface and the coarsing structure and structural characteristics; Second: the adaptability of the coarsening layer on the surface of copper foil to the substrate used. Copper foil should be corroded before oxidation to make it have a certain roughness, which is achieved through two technologies: first, etching coarser technology, such as the original mechanical brushing, blackening, oxidation methods, etc., forms a very rough appearance on the surface, but its structure is fragile and the bonding strength with the substrate is not high; The second is to improve micro-etching methods, such as bleaching technology and ion implantation technology. The characteristics of the improved technology are that not only the copper foil surface is micro-corroded, but also a new layer of characteristic coating can be generated to control the micro-rough structure of the copper foil surface, so as to achieve the dual goals of improving the bond strength and improving the integrity of signal transmission. Physical copper surface treatment technology of PCB before lamination It is the earliest pretreatment technology of copper surface before lamination. According to the process characteristics and the different materials used, it can be divided into mechanical brushing, volcanic ash brushing and plasma etching. Mechanical brushing technology Mechanical brushing technology is to use abrasive nylon brush rollers such as emery to brush the moving conductor surface under a certain mechanical pressure to remove the surface oxide layer and pollutants, and finally obtain a clean copper surface with a certain roughness. Due to the large hardness difference between the mechanical abrasive and copper, it will cause a depression in the copper surface and form a defect. Therefore, only when the signal transmission frequency is below 10MHz, the PCB surface treatment can use mechanical brushing technology. Volcanic ash brush technology Volcanic ash brush technology refers to the use of nylon brush rollers containing volcanic ash or Al2O3 powder and other abrasive materials to brush the copper foil surface in motion under certain mechanical pressure and humidity to remove the surface oxide layer and pollutants, and finally get clean and have a certain roughness of the copper surface. The hardness difference between volcanic ash and copper is small under wet conditions, so the surface roughness obtained by this method is irregular depression, with a size between 1 and 3um, which can meet the needs of high-frequency signal transmission line, and is currently widely used. However, with the increase of signal transmission frequency, this method can no longer meet the technical requirements, and the chemical coarsening method has become the technical progress direction of the industry. Plasma etching technology Plasma is a partially ionized gas, belonging to the fourth form of matter. According to the different excitation frequency, it can be divided into ultrasonic plasma, radio frequency plasma and microwave plasma. The plasma used in the PCB is generally a mixture of CF4 and O2 excited at 13.56MHz to form a radio frequency plasma. It consists of electrons, ions, free radicals, photons, and other neutral particles. Due to the existence of active particles such as electrons, ions and free radicals in the plasma, it is easy to react with the solid surface, and the neutral particles can be a good bombardment of the coarse particle surface. Therefore, the solid surface treated by plasma is not only clean without foreign bodies, but also can change the surface microstructure, which is mainly characterized by uniform etching, so as to achieve the ideal etching degree. Reference He Wei, PCB Basic Electrical Information Science and Technology, China Machine Press，146-150

PCB Knowledge ⋅ 12/24/2024 16:27

What Are the Difficulties in Heavy copper PCB ？

With the rapid development of China's automotive electronics and power communication modules, heavy copper printed circuit board has gradually become a special printed circuit board with broad market prospects, in automotive electronics, IGBT (insulated gate bipolar transistor) installation, wind power converter, ignition coil and other aspects are in demand: in addition, with the wide application of printed circuit board in the field of electronics. PCB Instant Quote .my-button { display: inline-block; padding: 10px 50px; font-size: 16px; text-align: center; text-decoration: none; background-color: blue; color: #fffff0; border: none; border-radius: 5px; font-weight: bold; cursor: pointer; box-shadow: 0px 2px 5px rgba(0, 0, 0, 0.3); transition: background-color 0.3s ease, transform 0.3s ease; } .my-button:hover { background-color: #C23C30; transform: scale(1.05); } The printed circuit board will not only provide the necessary electrical connection and mechanical support for electronic components, but also gradually be given more additional functions, so can integrate the power supply, provide high current, high reliability of the ultra-heavy copper multi-layer printed circuit board has gradually become a new product developed by the printed circuit board industry, with broad prospects. The profit margin is larger than the traditional circuit board, and it has a very large development value. Ultra-heavy copper multilayer printed circuit boards will occupy an important position in the future high-end circuit connection market, and will inevitably usher in a broader market prospect. What Are the Difficulties in Heavy copper PCB Manufacturing? Under normal circumstances, printed circuit boards with a thickness of 105um and above (including electrolytic copper pins after surface treatment and calendered copper foil) are collectively referred to as heavy copper boxes. According to the thickness of the pin, it can be divided into three types: 10Sm~300m is called heavy copper foil 300 ~600um is called super heavy copper foil 600m and above is called super MAX copper pin. Printed circuit boards made of heavy and ultra-heavy copper foils can be called "heavy copper printed circuit boards". It uses conductive materials (copper foil) and substrate materials, production processes, application areas are different from conventional printed circuit boards, so it is a special printed circuit board. The application field and demand of heavy copper printed circuit board have been rapidly expanded in recent years, and it has now become a kind of "hot" printed circuit board product varieties with good market development prospects. In the manufacturing process of heavy copper printed circuit board, there are more manufacturing process differences with ordinary printed circuit board manufacturing. It is mainly reflected in the etching of heavy copper foil, the lamination of heavy copper foil, the drilling of heavy copper foil and the printing resistance soldering of heavy copper foil. 1. Etching problem of heavy copper foil The etching of ultra-heavy copper will cause a large side corrosion problem, so that the etched line profile presents a "long trapezoid" or even a triangular structure, resulting in a great difference from the design of the printed circuit board. Therefore, reducing excessive engraving of ultra-heavy copper foil is a difficult problem faced by heavy copper printed circuit boards. 2. Lamination problem of heavy copper foil Due to the heavyer copper foil of the inner core plate, compared with ordinary heavy copper foil, the amount of resin that needs to be filled with heavy copper foil is greatly increased, which poses a great challenge to the resin load material and the corresponding processing technology to achieve the true filling function: 1) The resin content that can be carried by traditional semi-cured sheets is limited. Although the superposition method of multiple thin semi-cured sheets can meet the overall resin content demand, there is still a high probability of pressing holes caused by insufficient filling 2) Some filling positions will have small cracks due to incorrect filling, and cracking will occur after thermal stress 3) In the vertical flow process of the resin penetrating through the glass fiber cloth to the lower layer to be filled with glue, due to the filtration effect of the glass cloth, the uniform distribution of the resin and the filler is destroyed, and the local filler is more and less resin, and the heat resistance of the corresponding filling position may be deteriorated. 4) During the pressing process, the glass fiber cloth displaces and forms a stress concentration point close to the sharp Angle of heavy copper. Due to the inconsistency between the thermal expansion coefficient of copper foil, resin and glass fiber cloth during thermal shock, the stress concentration point produces a "crack" problem 3. Drilling problem of heavy copper foil Because the copper foil is heavy and the heat is large, it often brings cracks and other defects to the quality of the hole wall, and also puts forward greater difficulty and challenge to the drilling process 4. Seal resistance soldering problem of heavy copper foil If the positive soldering wire printing is carried out according to the ordinary multilayer printed circuit board, it is difficult to cover the line well due to the insufficient amount of positive flux in the screen printing. If the dose of solder resistance ink is increased, the ink is easy to produce bubbles when filling heavy lines, resulting in difficulties in meeting the requirements of T art What Are the Key points of manufacturing process of heavy copper PCB? At present, the manufacturing process of heavy copper printed circuit boards is basically the same as that of ordinary multi-layer printed circuit boards, but there are differences with ordinary printed circuit boards in some key processes. In terms of solving key processes, each manufacturer has its own processing methods. The following from the heavy copper printed circuit board manufacturing problems of the product process points are introduced. 1. Heavy copper etching technology Heavy copper etching takes a longer time to complete the etching process. Therefore, in the etching process, the lateral erosion also becomes very serious. To solve the problem of lateral erosion is to solve the problem of lateral erosion. At present, the methods to solve the side corrosion are side etching inhibition method and double side etching method. (1) Side etching inhibition method Adding wetting agents and corrosion inhibitors to the etching solution can reduce the side corrosion of the etching solution to the line. Etching fluid wetting agent is a kind of organic matter that reduces the interfacial tension between etching fluid and copper surface, which can make the etching fluid fully contact with the copper surface and improve the etching rate. Corrosion inhibitor is a kind of organic matter that can be adsorbed on the surface of copper. The mode of action of this additive is that the adsorption amount of corrosion inhibitor in different parts of the copper surface is different due to the tip adsorption and the difference in spray pressure on the front and side of the line, which leads to the amount of corrosion inhibitor adsorbed on the side of the line being larger than that on the front, resulting in a lower etching rate on the side than that on the front, resulting in a smaller corrosion quantity on the side, which is presented as an increase in the etching factor. For example, adding the corrosion inhibitor benzotriamine breakdown to the etching solution increases the etching factor to 3.0. If the corrosion inhibitor and wetting agent can be well designed, the etching fluid can maintain the side corrosion within 2wm, and the etching factor is improved from the root. Therefore, the future direction of exploration of heavy copper acid etching fluid for printed circuits is to constantly pursue new acidic etching fluid additives. (2) Double-sided double etching Heavy copper lines are not only difficult to etch once, but also very difficult to form and press. In order to solve the above problems, the heavy copper foil material is directly used for step-by-step controlled etching technology, that is, the copper foil is first etched on the reverse side of 1/2 thickness, and then pressed together to form a heavy copper core plate, and finally the front etching to obtain the inner circuit pattern. Because of the step etching, the difficulty of etching is greatly reduced, and the difficulty of pressing is also reduced. For double-sided secondary etching method, two sets of photographic substrates are designed for each layer of line file. The image of the first etching should be mirrored to ensure that the line is in the same position when the forward/reverse control deep etching, and no dislocation will occur. Primary etching In order to ensure the overlap of the two lines, the expansion and contraction value should be measured after the first lamination, and the expansion and contraction compensation of the line should be adjusted. It is best to use laser direct imaging automatic alignment, which effectively improves the alignment accuracy. After optimization, the alignment accuracy can be controlled within 25um. In order to improve the etching quality of ultra-heavy copper lines, alkaline etching and acid etching are respectively used for comparative testing. 2. Heavy copper lamination technology Heavy copper lamination first needs to solve the problem of glue flow, that is, the implementation of glue resistance technology. The object of blocking flow in the blocking adhesive is the semi-cured sheet resin. When the temperature is 80 ~140C, the resin is converted from the semi-cured state at room temperature to the liquid state, at this time under the action of laminating machine h, the resin in the liquid state spreads to the four sides. Therefore, the structure of the process edge design of the inner layer heavy copper plate includes the wall brick process edge, the PAD mode process edge and the mixed process edge. In order to fill the glue between the lines, the multi-layer heavy copper plate needs to ensure that the plate thickness is within the required range, and the resin content and the semi-cured sheet of fine glass fiber cloth are selected as far as possible. In terms of uniformity control, it is necessary to use silicone as the key buffer layer in the spring pressing process, which plays the role of uniform distribution of pressure in the pressing. If the lamination problem can not be solved by changing the lamination parameters, it is necessary to fill the resin between the high-thickness copper lines with pre-coated resin or powder particles, and then semi-cured laminate, prefilled with liquid solid resin powder to meet the high filling requirements, and then supplement with semi-cured sheets with high resin content to meet the requirements of fine filling. It can also reduce the problem of crack caused by stress after lamination of glass fiber cloth reinforced semi-cured sheet. 3. Heavy copper drilling technology In order to solve the heat dissipation problem of heavy copper, the feed speed, drilling rate and withdrawal speed of the drilling hole should be properly illuminated. The range of reduction is adjusted according to the thickness of the steel pin. When stacking, it is also necessary to reduce the thickness of the stacking, and it is recommended that only two boards be stacked at a time of drilling. You can also adjust the cover plate to solve the problem of heat dissipation. The water-soluble substances on the cover surface of the cover can infiltrate the drill tool when the tool is advanced and withdrawn. The drill knife can be cooled at high temperatures, and the water-soluble substance evaporates into a gas. In addition, when drilling, pay attention to prevent the copper in the hole, drilling parameters should be properly reduced according to the machine and other conditions, to prevent broken bits and machine displacement. 4. Heavy copper solder resistance technology Soldering resistance production is a difficult point, because the copper thickness is too heavy, the base material and copper have a large drop, the screen printing can not be reached, the scraper push 1 to 2 times to fill the soldering resistance oil with the base material, but pushing the scraper too many times will cause the ink to enter the hole, so we must first make a file point screen only print the base material position. Check the screen printing effect after printing 2 to 3 times in different directions. If the substrate is not filled, print white paper to clean the screen plate. Then print two knives in different directions to check. After each plate is printed, it is necessary to print the white paper to clean the screen plate and then print the next one, so as to avoid ink manholes. After printing, it must be placed horizontally for more than 4h to pre-roast before the last printing resist soldering. The soldering resistance ink of the early printing is mainly used to smooth the surface of the plate to facilitate the dry film to be tight in the later period, so the height of the ink and the height of the copper surface should be consistent as far as possible. Recommended resist soldering production process: using only substrate screen printing single side substrate one side white screen printing one side exposure one side development one test one side curing one side substrate using only substrate screen printing one side white screen printing one side static one prebake one side exposure one development one test one cure one second double print resist soldering one normal production Reference He Wei, PCB Basic Electrical Information Science and Technology, China Machine Press，341-344

PCB Knowledge ⋅ 12/24/2024 14:42

What Is the Principle Blind Vias of PCB?

Printed Circuit Boards (PCBs) are the backbone of modern electronic devices, offering a platform for electrical connectivity and mechanical support for components. One of the advanced techniques in PCB manufacturing involves the use of blind vias. These specialized vias have revolutionized PCB design and functionality, particularly in high-density and high-performance applications. This article delves into the principles, process, advantages, functions, and impacts of blind vias on PCB manufacturing. PCB Instant Quote .my-button { display: inline-block; padding: 10px 50px; font-size: 16px; text-align: center; text-decoration: none; background-color: blue; color: #fffff0; border: none; border-radius: 5px; font-weight: bold; cursor: pointer; box-shadow: 0px 2px 5px rgba(0, 0, 0, 0.3); transition: background-color 0.3s ease, transform 0.3s ease; } .my-button:hover { background-color: #C23C30; transform: scale(1.05); } What Is the Principle of Blind Vias? A via in online PCB terminology is a pathway that allows electrical connection between different layers of a PCB. Traditionally, vias are categorized into through-hole vias, blind vias, and buried vias. Blind vias are distinctive because they connect an outer layer of the PCB to one or more inner layers but do not pass through the entire board. This feature allows designers to optimize space on the PCB, which is crucial in complex, multi-layer boards. Design Parameters Aspect Ratio Ø min. Ø max. Via Pad Annular ring min.* Blind Via (mechanical) 1:1 200µm 300µm 400µm 100µm ⇒ as Special production 1:1.2 150µm 150µm 350µm 100µm Blind Via (laser) 1:1 100µm 100µm 280µm 90µm What is the Process of Creating Blind Vias? The manufacturing of blind vias involves several meticulous steps, each ensuring precision and reliability. The process can be summarized as follows: 1. Drilling: The creation of blind vias begins with drilling. Unlike through-hole vias, blind vias require controlled-depth drilling to ensure they only penetrate to the required inner layer. This can be achieved through mechanical drilling or more advanced laser drilling. Laser drilling is often preferred for its precision, especially in high-density interconnect (HDI) PCBs. 2. Copper Deposition: Once the holes are drilled, they need to be electrically conductive. This is achieved through a process called electroless copper deposition. A thin layer of copper is deposited on the walls of the vias, creating an initial conductive layer. 3. Plating: The initial copper layer is then thickened through electroplating. The board is submerged in an electrolytic bath, and an electric current is passed through it, causing additional copper to deposit on the via walls. This step ensures that the vias are robust and capable of carrying the necessary current. 4. Surface Finish and Etching: After plating, the PCB undergoes surface finishing and etching processes to define the circuit patterns. This step also includes applying solder masks and other protective coatings to ensure durability and performance. 5. Inspection and Testing: The final step involves rigorous inspection and testing to verify the integrity and functionality of the blind vias. Techniques such as X-ray inspection and electrical testing are employed to detect any defects or discontinuities. What Are the Advantages of Blind Vias? Blind vias offer several significant advantages over traditional through-hole vias: 1. Space Optimization: By connecting only specific layers, blind vias free up valuable surface real estate on the PCB. This allows for more components to be placed on the board, facilitating miniaturization. 2. Improved Signal Integrity: In high-speed digital and RF applications, blind vias reduce signal path lengths, thereby minimizing signal degradation and electromagnetic interference (EMI). 3. Enhanced Reliability: With fewer interconnections traversing the entire board, there is a reduced risk of mechanical stress and potential failure, enhancing overall multilayer PCB reliability. 4. Layer Management: Blind vias allow for more efficient layer management, particularly in HDI PCBs, where they can be used to create complex interconnections without increasing board thickness. What Are the Functions and Applications? Blind vias are essential in several advanced applications, including: 1. HDI PCBs: High-Density Interconnect PCBs leverage blind vias to achieve higher wiring density, crucial for smartphones, tablets, and other compact electronic devices. 2. RF and Microwave Circuits: These circuits benefit from the reduced inductance and capacitance that blind vias offer, ensuring better performance at high frequencies. 3. Medical Devices: Miniaturization and reliability are critical in medical electronics, where blind vias enable the creation of compact, yet highly reliable PCBs. 4. Automotive Electronics: In the automotive sector, where space constraints and robust performance are essential, blind vias play a pivotal role in advanced driver-assistance systems (ADAS) and infotainment systems. What Is the Impact on PCB End-Product? The integration of blind vias in PCB design significantly impacts the final product in several ways: 1. Miniaturization: Products can be made smaller without compromising functionality, thanks to the efficient use of PCB space facilitated by blind vias. 2. Performance: The electrical performance of the PCB is enhanced due to shorter and more direct signal paths, which is critical for high-speed and high-frequency applications. 3. Complexity Designers can create more complex and feature-rich PCBs without increasing the number of layers or the overall size of the board. 4. Cost: While the initial manufacturing cost may be higher due to the specialized processes involved, the long-term benefits of increased reliability and performance can offset these costs. Blind vias are a powerful tool in the arsenal of PCB designers and manufacturers, offering a means to optimize space, improve performance, and enhance reliability in complex electronic devices. As the demand for smaller, faster, and more reliable electronics continues to grow, the use of blind vias is set to become even more widespread, driving innovations across various industries. Understanding the principles, processes, and advantages of blind vias is essential for anyone involved in the design and manufacture of modern PCBs. What Are the Differences among the 3 Types of Through-hole Vias? There are three types of through-hole vias that we often see, as follows: Plating Through Hole, referred to as PTH This is the most common type of via, and you can identify it by holding the PCB up to a light source,the holes that allow light to pass through are the plating through holes. This is also the simplest type of via to produce, as it can be made by drilling or laser-cutting holes directly into the circuit board, and is relatively inexpensive. However, in some cases, certain layers of the circuit board may not require connections through these PTHs. For example, if I bought the third and fourth floors of a six-story building and wanted to design an internal staircase connecting only the third and fourth floors, the space on the fourth floor would be wasted by the staircase connecting the first floor to the sixth floor. Therefore, while PTHs are inexpensive, they can sometimes take up additional space on the PCB. Vias are also divided into PTH and NPTH. Blind Via Hole, referred to as BVH Blind via are used to connect the outer layer of PCB circuits to adjacent inner layers via electroplated holes. Because the opposite side cannot be seen, it is called a blind via. This manufacturing process is used to increase the utilization of space for PCB circuit layers. However, special attention must be paid to the depth (Z-axis) of the drilling, as it can often cause difficulties with electroplating the inner space of holes and thus is almost no longer used by manufacturers. It is also possible to drill the necessary connecting holes in individual circuit layers during the manufacturing process and then bond them together at the end. For example, in a 2+4+2 layer board,you can drill the outermost two layers first,or the 2+4 layers can be drilled simultaneously, but this requires more precise positioning and alignment equipment.Take the example of buying a building above as an example. In a six-story house, there are only stairs connecting the first floor to the second floor, or connecting the fifth floor to the sixth floor, which are called blind via. Buried Via Hole referred to as BVH Buried via holes connect two or more inner layers without reaching the outer layer. This process cannot be achieved by drilling after bonding, and requires partial bonding of the inner layers, followed by electroplating treatment, before final bonding can be completed. It is more time-consuming and expensive than making plating through holes or blind via, and is typically used for high-density (HDI) circuit boards to increase available space for other circuit layers. Using the analogy of buying a building, when only the stairs between the third and fourth floors are connected in a six-story building, it is called buried via holes. Buried via holes cannot be seen from the appearance of the board and are actually located in the inner layers of the circuit board. Reference He Wei, PCB Basic Electrical Information Science and Technology, China Machine Press，120-122

PCB Knowledge ⋅ 12/23/2024 14:52

Why does lead-free solder affect PCB reliability?

The lead-free technology of electronic products is not only related to the printed circuit board problem, but also a system engineering problem. It involves a series of issues such as the performance of copper clad plate (CCL), the production process and technology of printed circuit board, the type and composition of lead-free solder, the welding method and technology of lead-free solder, the performance of components and the inspection methods, specifications and standards of the reliability of lead-free products. Therefore, it is necessary to understand this system engineering from a holistic point of view. PCB Instant Quote .my-button { display: inline-block; padding: 10px 50px; font-size: 16px; text-align: center; text-decoration: none; background-color: blue; color: #fffff0; border: none; border-radius: 5px; font-weight: bold; cursor: pointer; box-shadow: 0px 2px 5px rgba(0, 0, 0, 0.3); transition: background-color 0.3s ease, transform 0.3s ease; } .my-button:hover { background-color: #C23C30; transform: scale(1.05); } This chapter from the electronic products implementation of lead-free proposal, the basic characteristics of lead-free solder, lead-free solder welding characteristics and requirements of the main requirements of electronic components, copper clad plate substrate materials, printed circuit board product substrate and related tests and standards, etc., the implementation of lead-free electronic products are discussed in detail. The purpose is to enable readers to have a more comprehensive understanding of this, in order to facilitate electronic products (including raw materials, components, printed circuit boards, assembly, etc.) manufacturers, especially related engineering and technical personnel, from the overall perspective to understand, research and solve the problem of lead-free electronic products, So that electronic products can smoothly and quickly transition from the lead (tin-lead system) era to the lead-free era. What Are EU Requirements for Environmental Friendliness？ In the early 1990s, the United States first came up with a standard to limit the benefits of marriage in electronic products. However, because there was no (printed circuit processing and want to solder technology is not mature, there is no live replacement. Coupled with forced restrictions on the lead content of electronic products, will reduce the reliability of electronic products. In the future, some high-end electronic products, such as defense, military, aerospace, aviation or high-reliability fields, or to buy solders containing relaxation. So far, the best tin-silver solder SAC305, although its performance is close to that of tin-lead solder, its reliability is still not as good as that of tin-lead solder. However, the research work of lead-free has not stopped, and the development progress of substitutes for tin-lead systems has been further strengthened in recent years, and practical tin-silver-copper systems (such as SAC305, Sn-96.5/Ag3.0/C0.5) and tin-copper systems (such as Sn-99.2/Cu0.8) have been successfully developed. The performance and availability of these systems are close to that of tin-lead systems. The conditions and opportunities for lead-free electronic products are approaching maturity. As a result, the European Union promulgated the RoHS directive (that is, the Directive on the Restriction of the use of Certain Hazardous Components in Electrical and Electronic Equipment) and the WEEE Directive (that is, the Waste Electrical and Electronic Equipment Directive) on February 13, 2003, and officially implemented on July 1, 2006. Then, China has also formulated the "Measures for the Prevention and Control of pollution of Electronic Information Products" and the "Measures for the Management of pollution of electronic products" and other relevant legislation (draft) work (implemented on March 1, 2007) to control the environmental pollution and harm caused by the processing, assembly, use and waste of domestic electronic products. And encourage and promote electronic products to take the road of green cleaner production and sustainable development. The promulgation and implementation of these directives marked the arrival of the lead-free era. The core content of the two EU directives :D from July 1, 2006, new electrical and electronic products placed on the market should be free of lead, mercury, hexvalent chromium, polyphthalate (PBB) and polyphthalate (PBDE) these six harmful substances, as resin flame retardant bisphenol A (TBBPA) is not included; The manufacturer of electronic products is responsible for the collection, sorting and treatment of waste electrical and electronic equipment for recycling, and bears the associated costs; 3 The organization dealing with waste electrical and electronic equipment shall obtain the permission of the competent authority (department), and the unit dealing with waste electrical and electronic equipment shall comply with the requirements of Annex III of the WEEE Directive when storing and disposing of waste electrical and electronic equipment. As can be seen from the above two instructions, in the printed circuit board (or copper clad plate substrate), one of the most important components of electronic products, the largest amount of flame retardant 1-4 O bisphenol A (TBBPA), after long-term practice and repeated scientific tests have shown that it is harmless, not among the harmful substances. Then, the European Union confirmed in the latest revised risk assessment report in December 2004 that "quadruple bisphenol A" is safe for human health, and the environmental risk assessment was completed in 2005. In July 2005, at the "Green Production of copper clad plates and printed Circuits and the Application of Quadruple Bisphenol A Seminar" in Shenzhen, China. Dr. Raymond B Dawson, president of the Australian Institute for Science and the Environment (BSEF), reiterated this view, noting that the continued use of tetrabisphenol A was permitted. From the current situation, the impact on the multilayer printed circuit board or copper clad plate is a lead-free solder problem rather than a halogen-free flame retardant problem. Therefore, lead-free is currently and in the future to promote the change and development of copper clad plate materials, printed circuit board production and electronic assembly and other industries. At the same time, lead-free electronic products refer to electronic products (including raw and auxiliary materials, printed circuit boards, components, etc.) in the manufacturing, processing, coal bonding, assembly and use of products that do not contain lead components. What Are the Basic Conditions for Lead-free Solder? Lead-free solder to replace the traditional leaded coal, must meet or close to the main basic characteristics of leaded solder, including :D lead-free solder low eutectic (crystal point: no trace coal bonding "wet"), the reliability of the solder joint. 1. Low eutectic (crystal) point of lead-free solder Considering the requirements of technological conditions such as welding and assembly of electronic products, the lead-free welding process cannot destroy the basic characteristics of components, assemblies and printed circuit board substrates in electronic products. Therefore, the low eutectic (crystal) point of lead-free solder should be as close as possible to the low eutectic (crystal) point 183C of traditional Sn-Pb alloy solder. Too high a low eutectic (low eutectic) point of lead-free solder will destroy the fundamental characteristics of components, assemblies, and printed circuit board substrates that have been developed over time in electronic products. (1) Adaptability of components, assemblies and printed circuit board substrates at high temperature welding For a long time, the traditional Sn-Ph alloy solder system has been used for electronic products. Therefore, the heat resistance temperature of the components, assembly parts and printed circuit board substrate established by lead-free solder should be adapted to the welding conditions and requirements of the Sn-P alloy solder system. If the low eutectic (crystal) point of the lead-free solder is too high or much higher than 183C, it means that the welding temperature will also be much higher than the welding temperature of the Snp alloy solder. When the welding temperature of the lead-free solder exceeds the heat resistance temperature of the components, assemblies and online printed circuit board substrates, it means that the basic performance and reliability of the components, assemblies and printed circuit board substrates after welding and assembly cannot be guaranteed (maintained). At present, the best lead-free solder composition that can replace the traditional Sn-Pb alloy is Sm-Ag-Cu (SAC305) alloy system, whose low eutectic (crystal) point is 217C, which is higher than the low eutectic (crystal) melting point of Sn-Pb alloy solder is 34C. Therefore, the welding temperature of Sn-Ag-Cu alloy solder is correspondingly higher by 20 ~40C. In order to adapt to the improvement of the low eutectic (crystal) point of lead-free solder, some few components, assembly parts and printed circuit board substrates with poor heat resistance should be improved and improved in time. For example, the common FR-4 substrate used in conventional printed circuit board substrates has a solution temperature of epoxy resin (Z;). Too low, mostly about 310C, must be improved and raised to about 350C, in order to meet the current requirements of ship-free solder welding conditions. For components, assemblies and PCB substrates with poor heat resistance, lead-free solder with a lower eutectic (crystal) point than the traditional Sn-Pb solder system can be used for welding, such as the Sn-Bi (58%) alloy solder with a low eutectic (crystal) point of 139C. However, due to the performance of Sn-Bi alloy solder, it is only suitable for low-grade, low-grade or low-grade electronic products with low reliability requirements. (2) The adaptability of welding equipment and facilities to the low eutectic (crystal) point of lead-free solder at high temperature coal connection is established with the welding temperature and conditions of the Sn-Pb alloy solder. The art comes from the inevitable dimension of the heating temperature and time before the welding, the highest temperature and time of welding. This means that the welding of Mingti Bay without solder has no thermal performance, and even corrosion resistance (such as lead-free solder will obviously corrode the stainless tank, so it is necessary to use chin steel materials, etc.) and the corresponding facility conditions. What Is Weldability of Lead-free Solder? 2. From the basic requirements of the welding process conditions of electronic products, the most important thing is to require lead-free solder to have good weldability. That is to say, the lead-free solder fused at welding temperature should have good wettability to the non-device pins (or bumps, etc.) and the pad (pad) on the printed circuit structure. Only good wettability can get a good welding point, which is very important. The weldability of lead-free solder refers to its wettability at welding temperature. The wettability of lead-free solder at welding temperature is determined by the size of its surface tension, the greater the surface tension, the worse the wettability, the worse the weldability. Therefore, the surface tension of lead-free solder at welding temperature should be close to the surface tension of traditional Sn-Pb solder at welding temperature to ensure the wettability of lead-free solder at welding temperature, so as to ensure its weldability. Although increasing the welding temperature can reduce the surface tension of lead-free solder and improve the wettability. However, too high a processing temperature and welding temperature for the overall reliability of electronic products is very unfavorable. The addition of flux can improve the surface tension and weldability of welding, but the effect of flux is very limited [it has been used in the welding of traditional Sn-Pb solder, and it is impossible to reduce the surface tension. On the contrary, the higher welding temperature of lead-free solder will destroy the flux (such as thermal decomposition or volatilization) and lose the effect of flux in reducing the surface tension. Therefore, it is necessary to develop and use lead-free fluxes that are more resistant to high temperature, such as high temperature fluxes above 300C. The size of the surface tension or weldability mainly depends on the composition and characteristics of the lead-free solder itself. 3. Reliability of lead-free solder joints There are many factors affecting the reliability of electronic products, and the reliability of the solder joint formed by no solder is one of the most important because of the cage pick bag according to the inert canister Ai Shanron waste bag (1) The thermal fatigue strength of solder joints The availability of solder joints is determined by the mechanical and physical characteristics of the solder itself, especially the resistance (resistance) of the solder joints formed by the solder. That is to say, the solder should not only be able to form a good (interface) bonding force with the pin of the piece and the pad (pad) metal surface on the printed circuit board, but also the solder itself should have good thermal fatigue resistance, so that the solder joint can have good reliability. Because electronic products in the welding and use of the process, the solder joint is always constantly subjected to thermal shock, can not avoid the occurrence of "thermal expansion" and "cold contraction", coupled with the component pins and other thermal expansion coefficient (CTE) and printed circuit board, Y direction of the thermal expansion coefficient there is a large difference between. The solder layer in the solder joint must be "thermal expansion" or "cold contraction" to form residual stress (commonly known as thermal stress). When the magnitude of this residual stress exceeds the heat resistance fatigue strength or bonding force of the solder, the solder at the solder joint will fracture, thereby reducing the reliability of the coal point (2) The bonding strength of the solder at the solder joint The bonding strength of the solder at the solder joint refers to the bonding strength between the metal surface of the component pin and the solder, and between the solder and the printed circuit board solder pad (to be exact, it should be the metal surface on the printed circuit board solder pad, which can be Cu.Au, Sn, Ag, Ni, etc.). The bonding force of solder at the solder joint refers to the bonding strength and the volume of the bonding area between the metal surface of the component pin and the solder, between the solder and the printed circuit board solder pad. Similarly, the residual stress or thermal stress caused by "thermal expansion" and "cold contraction" during welding and subsequent use due to the difference in the coefficient of thermal expansion at the solder joint), when this residual stress is not less than the binding force between the lead metal surface of the component and the solder, or the binding force between the solder and the metal surface of the printed circuit board solder pad, At the metal surface of the component pin of the solder joint or on the metal surface of the printed circuit board solder pad, the peeling phenomenon will occur, which affects the reliability. (3) The integrity of the solder joint (wettability) The integrity of the solder joint refers to the degree of welding defects at the solder joint. The welding defects at the solder joints are related to the solder type, composition and production (equipment, operation, etc.) conditions. Welding defects mainly depend on the physical characteristics of the solder itself, in particular the size of the surface tension (or wettability) of the solder at welding temperature. As mentioned above, the greater the surface tension of the solder during welding, the worse the wetness of the solder, the worse the integrity of the solder joint, such as the solder joint is not full, hollow, peeling, brittle and so on. Due to the large surface tension of lead-free solder, high welding temperature, long time and fast cooling speed after welding, the probability and degree of these defects are larger. (4) The influence of intermetallic compounds In the high-temperature welding process, the surface metal or the surface coated metal at the welding interface will melt into the molten solder, and form intermetallic compounds, such as Cu,Sns, Cu,Sn; NiSn4, Au; Sn(Cu,Ni)Sn, etc. The thickness (or number) of these intermetallic compounds at the interface will change with the temperature, welding methods and times. At the same time, some of these intermetallic compounds are weldable (e.g. Cu,Sng) and some are non-weldable (e.g. Cu,Sn;). . If Ni,Sna, (Cu,Ni)Sn are present at the same time, the internal stress (lattice dislocation, etc.) of the structure will be generated due to the different structures of the two intermetallic compounds at the interface, which will affect the reliability. Also, when Au; When the mass fraction of Sn exceeds 3%, brittle solder joints can be formed, which reduces the welding reliability. Reliability of PCB When Soldering with Lead-free Solder Because NUCCO requires higher preheating leakage, programmed connection temperature, longer high temperature contact time and logical cooling rate, the printed circuit board substrate will be subjected to greater (high) thermal shock and thermal stress than the traditional 5 coal system welding, which will also bring greater damage to the printed circuit board substrate, and the result will inevitably affect the reliability of the printed circuit board substrate. The impact of lead-free solder on the reliability of conventional printed circuit board substrate during welding is mainly manifested in five aspects printed circuit board substrate delamination, cracks, discoloration, etc. :@ layer cracks, disconnects, and even dips (similar to concave shrinkage) with the connected through hole; @ Pad (connecting plate) warping, falling off, printed circuit board substrate, warping; Conductive anode wire (CAF) phenomenon is more likely to occur. The hazards of these five aspects are directly proportional to heat (temperature), so the degree of harm will be higher and greater than the probability of damage caused by traditional Sn-Pl solder during welding. These hazards are not only the requirements for copper-clad plates, but also the challenges posed to the printed circuit board substrate. (1) PCB substrate layering, cracks and discoloration, etc. The degree of PCB substrate layering, cracks and discoloration is directly proportional to heat. The welding temperature of lead-free solder is 20 ~40C higher than that of traditional Sn-Pb solder, and the residence time in high temperature welding (molten state) is 1/3 ~1/2 longer and the cooling speed is faster. This is prone to the following problems. Due to the difference in the coefficient of thermal expansion of the materials in the substrate, it is easier to layer bubbles between the layers of the conventional printed circuit board substrate, especially between the semi-cured sheet and the copper clad laminate substrate (including conductive graphics) in the multi-layer printed circuit board. Microcracks occur between the glass fiber cloth and the resin or the inner layer resin in the substrate medium layer, which is due to the CTE of the glass fiber cloth (5 x10- ~7 x10-C-) and the coefficient of thermal expansion of the resin (conventional epoxy resin at a temperature less than T, the coefficient of thermal expansion is about 80 x10-6C, and when the temperature is greater than or equal to 7, the coefficient of thermal expansion is about 80 x10-6C. Its coefficient of thermal expansion will exceed 200 x10-c -) difference, Or is caused by the difference between the coefficient of thermal expansion of copper foil (coefficient of thermal expansion of 17x10-6C-') and the dielectric layer (coefficient of thermal expansion of 14 x10- ~17 x10-c -) or even the coefficient of thermal expansion of copper clad laminate substrate and semi-cured sheet (that is, mainly the difference between the "new" and "old" dielectric layer), etc. It may also be related to the lower decomposition temperature (T) of the resin, 3 the surface discoloration of the printed circuit board substrate (a symbol of the beginning of carbonization), which indicates that the structure of the resin has changed or the decomposition phenomenon has occurred under high temperature welding. (2) The cracks, disconnections and stripping of the connecting through holes between layers are reliability problems caused by the difference in thermal expansion coefficient between the dielectric layer in the substrate and the copper coating through holes. The difference is that the difference in the coefficient of thermal expansion is mainly caused by the large difference in the coefficient of thermal expansion between the resin and the copper plating layer in the Z direction. The metallographic microsection of the printed circuit board shows that the problem of interlayer connection through holes mainly occurs when PCB is disconnected from the through hole copper coating at the 2nd and (n-1) layers, because the copper binding in the multi-layer printed circuit board substrate at these two connections is poor (compared with the outermost layer, because the outermost layer has thicker copper protection) and the second largest expansion. Of course, it is also the largest difference in the coefficient of thermal expansion; 2 Local cracks in the inner wall of the hole, most of which occur in the hole where the coating has defects, such as holes, impurities or places where the copper plating layer is thin; 3 Annular disconnection (cracking) occurs somewhere in the inner wall of the hole, mainly due to the uneven thickness of the copper coating in the hole (often occurring at the thinnest point), especially in the case of conventional DC plating. Of course, these three defects may also be due to the low ductility of the copper coating (such as when the ductility of the copper coating is less than 12%), which aggravates the probability and degree of these defects under the welding conditions of lead-free solder. (3) Pad warping and falling off. When welding with lead-free solder, the pad on the printed circuit board will have a greater probability of warping and falling off (see Figure 16-8 and Figure 16-9). According to the research report, there are two main reasons for the warping and falling off of the pad :@ Under the impact of high heat (high temperature welding), high thermal stress caused by the difference in the thermal expansion coefficient of different materials (copper and resin), which means that high thermal stress (note, This refers to the high freezing point and rapid cooling rate of lead-free solder after welding) has exceeded the bonding force between the copper foil and the resin (especially when the high-density small pad and narrow ring width, the warping is more serious, and the copper foil of the pad has a higher temperature (copper has high thermal conductivity and high heat transfer rate), so that the resin surface under the pad has a higher temperature. Thus, the tree looks (especially the decomposition temperature of conventional epoxy resins, which is low, i.e. =310 320) due to local high temperature # solution. Other reasons for pad warping and falling off, such as the grade and performance of the copper clad box laminate substrate, the processing of the printed circuit board, etc. (4) The printed circuit board substrate warping and twisting regardless of the ordinary single and double sided printed circuit board, or multi-layer printed circuit board, the high-temperature welding of lead-free solder will form greater warping and warping. This is because the welding of lead-free solder must be carried out under higher temperature and longer time conditions, coupled with the need for faster cooling rate and higher freezing point (the same as the low eutectic point) after welding, so that the thermal expansion coefficient of various materials inside the overall printed circuit board substrate is more different (note, This refers to the result of the high freezing point and rapid cooling temperature of the lead-free solder after welding), and the corresponding comprehensive thermal stress is also large, so in the "free" state of cooling down, it shows greater warpage and distortion. Conductive Anodic Filament (CAF) Conductive anodic filament (CAF) is a type of copper migration along the glass fiber of the laminate, which can cause a short circuit if not contained. There are not many researches and reports on whether welding with lead-free solder will produce conductive anode wires with higher probability. However, from the mechanism of the generation of conductive anode wires, it can be known that the conditions for its production are :D there are mobile ions (can be internal or external); @ Humid (moisture, moisture, solution, etc.) conditions; The voltage that forms the electrode; The formation of channels, such as cracks, separation or surface contamination in the dielectric layer between conductive layers (or holes, lines). Obviously, lead-free solder requires higher welding temperature and longer welding time, so that the probability and degree of defects (channels forming conductive anode wires) in the welding of the printed circuit board substrate is greater, which undoubtedly increases the probability of the formation of conductive anode wires. Under the development trend of printed circuit boards towards high density, the spacing between the through-hole and the through-hole, the wire and the wire, the layer and the layer (the medium layer is thinner and thinner) is getting smaller and smaller. The probability of conducting anode wires on high-density printed circuit boards also increases accordingly. Therefore, in the background of the development of printed circuit boards for high-density development of lead-free solder welding, the thermal problem of conductive anode wire should be paid attention to. Reference He Wei, PCB Basic Electrical Information Science and Technology, China Machine Press，345-349

PCB Knowledge ⋅ 12/23/2024 14:38

What Is PCB Recycling Technology？

Printed Circuit Boards (PCBs) are integral components in a vast array of electronic devices, from smartphones and computers to medical equipment and industrial machinery. As technology advances and the production of electronic devices increases, so does the amount of PCB waste. This waste poses significant environmental challenges, necessitating effective recycling and reclamation technologies. This article delves into the various methods and technologies involved in the recycling and reclamation of PCBs, focusing on both liquid and solid waste recovery as well as the treatment of obsolete PCBs. PCB Instant Quote .my-button { display: inline-block; padding: 10px 50px; font-size: 16px; text-align: center; text-decoration: none; background-color: blue; color: #fffff0; border: none; border-radius: 5px; font-weight: bold; cursor: pointer; box-shadow: 0px 2px 5px rgba(0, 0, 0, 0.3); transition: background-color 0.3s ease, transform 0.3s ease; } .my-button:hover { background-color: #C23C30; transform: scale(1.05); } PCB Composition and Environmental Impact PCBs are composed of various materials, including fiberglass, epoxy resin, and a mix of metals like copper, gold, silver, and palladium. The presence of hazardous substances such as lead and brominated flame retardants further complicates their disposal. Improper handling and disposal of PCB waste can lead to soil and water contamination, posing risks to human health and the environment. Therefore, efficient recycling methods are essential to mitigate these risks and recover valuable materials. Recycling Processes for Liquid Waste During the PCB manufacturing process, several liquid wastes are generated, including etching solutions, plating baths, and cleaning solvents. These liquids often contain metals, acids, and other chemicals that can be hazardous if not properly treated. The primary methods for recycling and reclaiming liquid waste from PCB manufacturing are: Chemical Precipitation: This process involves adding chemicals to the liquid waste to convert dissolved metals into insoluble particles. These particles can then be filtered out, allowing for the recovery of metals such as copper and gold. The remaining liquid can be treated further to neutralize any remaining hazardous substances before discharge. Electrochemical Recovery: Electrochemical techniques, such as electroplating and electrowinning, are used to recover metals from liquid waste. In electroplating, a direct current is passed through the solution, causing metal ions to deposit onto a cathode. Electrowinning, on the other hand, uses an electric current to reduce metal ions to their solid form, which can then be collected and refined. Membrane Filtration: This method employs membranes to separate contaminants from liquid waste. Techniques such as reverse osmosis, ultrafiltration, and nanofiltration are effective in removing metal ions, organic compounds, and other impurities. The concentrated waste can be further processed to recover valuable materials, while the purified water can be reused in the manufacturing process. Ion Exchange: Ion exchange resins are used to remove metal ions from liquid waste by exchanging them with non-hazardous ions. This method is particularly effective for recovering precious metals and other high-value materials. The spent resin can be regenerated and reused, making this a cost-effective and sustainable solution. Recycling Processes for Solid Waste Solid waste generated during PCB manufacturing includes offcuts, defective boards, and spent materials. The recycling of solid PCB waste involves several steps to separate and recover valuable materials while ensuring the safe disposal of hazardous substances. Mechanical Processing: Mechanical methods such as shredding, grinding, and milling are used to reduce the size of PCB waste. This facilitates the separation of different materials based on their physical properties. For instance, metallic particles can be separated from non-metallic components using techniques like magnetic separation and eddy current separation. Thermal Processing: Thermal methods involve heating PCB waste to high temperatures to decompose organic materials and recover metals. Pyrolysis, incineration, and gasification are common thermal techniques. Pyrolysis heats the waste in the absence of oxygen, producing char, oil, and gas. Metals remain in the char, which can be processed further to extract valuable metals. Incineration and gasification, on the other hand, involve burning the waste with controlled amounts of oxygen, generating energy and reducing the volume of waste. Chemical Processing: Chemical methods use solvents, acids, and other chemicals to dissolve and recover metals from PCB waste. Hydrometallurgical processes involve leaching metals with acids or other solvents, followed by precipitation or electrochemical recovery. This method is particularly effective for recovering precious metals such as gold and palladium. However, it requires careful handling of chemicals and the treatment of waste liquids to prevent environmental contamination. Biological Processing: Emerging technologies such as bioleaching use microorganisms to extract metals from PCB waste. Certain bacteria and fungi can oxidize metals, converting them into soluble forms that can be recovered from the solution. Bioleaching is a low-energy, environmentally friendly alternative to traditional chemical methods, though it is currently less common and still under development for large-scale applications. Treatment of Obsolete PCBs Obsolete PCBs from discarded electronic devices represent a significant portion of electronic waste (e-waste). Effective treatment and recycling of these PCBs are crucial to recover valuable materials and reduce environmental impact. Dismantling and Sorting: The first step in treating obsolete PCBs is dismantling the electronic devices to separate the PCBs from other components. Manual dismantling ensures the recovery of intact PCBs, which can then be sorted based on their material composition and potential value. Automated systems using robotic arms and artificial intelligence are increasingly being used to improve efficiency and reduce labor costs. Mechanical Recycling: Once sorted, PCBs undergo mechanical processing to separate different materials. Techniques such as shredding, milling, and screening help to liberate metal particles from the non-metallic matrix. Magnetic and eddy current separators further separate ferrous and non-ferrous metals, while density separation techniques such as froth flotation and air classification can isolate different types of plastics and fiberglass. Thermal and Chemical Recycling: To recover metals from obsolete PCBs, thermal and chemical methods are employed. Pyrolysis and incineration can be used to decompose organic materials, leaving behind metal-rich ash. Hydrometallurgical processes, such as acid leaching and solvent extraction, dissolve metals for recovery through precipitation or electrochemical methods. These processes are effective for extracting precious metals and other high-value materials, though they require careful management of waste streams to minimize environmental impact. Refinement and Purification: The final step in PCB product recycling involves refining and purifying recovered metals to produce high-purity products. This may involve additional chemical treatments, electrorefining, and smelting. The purified metals can then be sold and reused in the production of new electronic devices, closing the loop in the recycling process. Regeneration and Recycling of Acidic Etching Solution in PCB Manufacturing Printed Circuit Boards (PCBs) are essential components in virtually all electronic devices. The manufacturing process of PCBs involves several steps, including the etching of copper layers to form circuit patterns. Acidic etching solutions, typically composed of hydrochloric acid (HCl) and cupric chloride (CuCl₂), are commonly used for this purpose. Over time, these etching solutions become saturated with dissolved copper and other impurities, necessitating their regeneration and recycling to maintain efficiency and reduce environmental impact. This article delves into the processes involved in the regeneration and recycling of acidic etching solutions used in PCB manufacturing, with a focus on the underlying chemical reactions and corresponding equations. Chemical Composition and Function of Acidic Etching Solutions The primary components of acidic etching solutions in PCB manufacturing are hydrochloric acid and cupric chloride. The solution operates on the principle of oxidation and reduction reactions, where the copper layer on the PCB is oxidized and dissolved into the solution. The overall reaction can be represented as follows: Cu (solid) + 2HCl (aq) + CuCl2 (aq)→ 2 CuCl (aq) + 2H+ (aq) In this process, the copper (Cu) from the PCB reacts with hydrochloric acid (HCl) and cupric chloride (CuCl₂) to form cuprous chloride (CuCl) and hydrogen ions (H⁺). Saturation and Depletion of Etching Solutions As the etching process continues, the solution becomes saturated with cuprous chloride, leading to a decrease in etching efficiency. Additionally, the concentration of hydrochloric acid diminishes over time. To maintain the effectiveness of the etching process, the spent etching solution must be regenerated or replaced. Regeneration is preferred as it reduces waste and lowers operational costs. Regeneration of Acidic Etching Solutions Regeneration of acidic etching solutions involves oxidizing the dissolved cuprous chloride back to cupric chloride and replenishing the hydrochloric acid. The typical regeneration process can be divided into two main steps: oxidation and acid replenishment. 1. Oxidation of Cuprous Chloride Cuprous chloride (CuCl) in the spent etching solution is oxidized to cupric chloride (CuCl₂). This can be achieved using various oxidizing agents, such as chlorine gas (Cl₂), hydrogen peroxide (H₂O₂), or oxygen (O₂). The chemical reactions for these oxidizing agents are as follows: Using chlorine gas: 2CuCl (aq) + Cl2 (g) \rightarrow→ 2CuCl2 (aq) Using hydrogen peroxide: 2CuCl({aq) + H2O2(aq) + 2HCl(aq) → 2 CuCl2 (aq) + 2H2 O (l) Using oxygen: 4CuCl(aq) + O2(g) + 4HCl(aq) → 4CuCl2 (aq) + 2H2 O (l) Each of these reactions effectively regenerates the cupric chloride necessary for continued etching, restoring the oxidizing power of the solution. 2. Acid Replenishment Hydrochloric acid is consumed during the etching process, leading to a decrease in its concentration. To restore the solution's acidity, additional hydrochloric acid is added. The amount required is determined by the concentration of the spent solution and the desired concentration for optimal etching performance. Recycling of Acidic Etching Solutions Recycling involves not only regenerating the spent solution but also recovering and purifying the dissolved copper. This process ensures the continuous use of the etching solution and minimizes environmental impact. The recycling process can be broken down into several steps: 1. Precipitation of Copper One common method for recovering copper from the spent etching solution is through precipitation. Copper can be precipitated as copper(I) oxide (Cu₂O) or copper(II) hydroxide (Cu(OH)₂) by adjusting the pH of the solution using alkali substances such as sodium hydroxide (NaOH) or calcium hydroxide (Ca(OH)₂). The reactions are as follows: Precipitation of copper(I) oxide: 2CuCl(aq) + 2NaOH(aq} → Cu2O (s) + 2NaCl (aq) +H2 O (l) Precipitation of copper(II) hydroxide: CuCl2(aq) + 2NaOH (aq)→ Cu(OH) 2 (s) + 2NaCl (aq) The precipitated copper compounds are then filtered out from the solution. 2. Conversion to Metallic Copper The precipitated copper compounds can be further processed to recover metallic copper. This is typically done through reduction reactions using agents such as hydrogen gas (H₂) or carbon monoxide (CO). The reduction reactions are as follows: Reduction of copper(I) oxide: Cu2O (s) +H2 (g) → 2 Cu(s) +H2O (g) Reduction of copper(II) hydroxide: Cu(OH)2 (s) +H2 (g) →Cu (s) + 2 H2O (l) The metallic copper obtained can be reused in various industrial applications, thus closing the loop in the recycling process. Environmental and Economic Benefits Regenerating and recycling acidic etching solutions offer significant environmental and economic benefits: 1. Reduction of Hazardous Waste: Proper regeneration and recycling reduce the amount of hazardous waste generated, minimizing the environmental impact and associated disposal costs. 2. Resource Conservation: Recovering and reusing copper and other materials from spent etching solutions conserve valuable natural resources and reduce the demand for raw materials. 3. Cost Savings: Recycling processes can significantly lower the operational costs of PCB manufacturing by reducing the need for fresh etching solutions and raw materials. 4. Regulatory Compliance: Adhering to environmental regulations and implementing sustainable practices help companies avoid penalties and enhance their corporate image. The regeneration and recycling of acidic etching solutions in PCB manufacturing are essential for maintaining the efficiency of the etching process and minimizing environmental impact. By employing chemical processes to regenerate etching solutions and recover valuable materials, manufacturers can achieve sustainable and cost-effective production. Understanding the underlying chemical reactions and implementing advanced recycling techniques are crucial steps towards a more environmentally friendly and economically viable PCB manufacturing industry. Challenges and Future Directions While current recycling technologies offer effective solutions for PCB waste management, several challenges remain. The complexity of PCB material composition, the presence of hazardous substances, and the economic viability of recycling processes are significant hurdles. To address these challenges, ongoing research and development are focused on improving the efficiency and sustainability of recycling methods. Enhanced Material Recovery: Innovations in mechanical, thermal, and chemical processing aim to increase the recovery rates of valuable materials from PCB waste. Advanced sorting technologies, such as sensor-based sorting and artificial intelligence, can improve the accuracy and efficiency of material separation. Green Technologies: The development of environmentally friendly recycling methods, such as bioleaching and solvent-free chemical processes, is crucial to reducing the environmental impact of PCB recycling. These technologies offer potential benefits in terms of lower energy consumption and reduced chemical use, though further research is needed to scale them up for industrial applications. Economic Viability: To make PCB recycling economically viable, it is essential to optimize processes and reduce costs. This can be achieved through automation, improved resource efficiency, and the development of new markets for recovered materials. Government incentives and regulatory frameworks can also play a crucial role in supporting the growth of the recycling industry. Circular Economy: Moving towards a circular economy model, where products are designed for recyclability and materials are continuously reused, can significantly reduce PCB waste. This involves designing electronic devices with modular components, using recyclable materials, and implementing take-back programs to facilitate the collection and recycling of obsolete products. PCB recycling and reclamation technologies are vital for managing the growing volume of electronic waste and recovering valuable materials. By employing a combination of mechanical, thermal, chemical, and biological processes, it is possible to efficiently recycle both liquid and solid waste generated during PCB manufacturing and from obsolete electronic devices. Despite the challenges, advancements in technology and a shift towards a circular economy offer promising solutions for sustainable PCB waste management. Through continued innovation and collaboration, the environmental impact of PCB waste can be minimized, contributing to a more sustainable future. Reference He Wei, PCB Basic Electrical Information Science and Technology, China Machine Press，416-422

PCB Knowledge ⋅ 12/21/2024 15:49